CLVC2G74QDCURG4Q1

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  "slug": "clvc2g74qdcurg4q1",
  "title": "CLVC2G74QDCURG4Q1",
  "brief": "Texas Instruments Flip Flops, VSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
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  "component": {
    "mpn": "CLVC2G74QDCURG4Q1",
    "manufacturer": "Texas Instruments",
    "package": "VSSOP-8",
    "pin_count": 8,
    "category": "Logic",
    "subcategory": "Flip Flops",
    "datasheet": "https://www.ti.com/cn/lit/gpn/sn74lvc2g74-q1",
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      "lbr": "clvc2g74qdcurg4q1.lbr"
    },
    "distributor_links": {
      "lcsc": "C2871790",
      "digikey": "296-CLVC2G74QDCURG4Q1TR-ND",
      "mouser": "595-LVC2G74QDCURG4Q1"
    },
    "distributor_check": {
      "checked_at": "2026-10-11T12:54:18Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-CLVC2G74QDCURG4Q1TR-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-LVC2G74QDCURG4Q1",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "CLK",
        "type": "input",
        "description": "Positive-edge clock input; data at D is transferred to the outputs on the positive-going edge, and the minimum CLK pulse width is 3.3 ns at VCC = 5 V (6.2 ns at 1.8 V)."
      },
      {
        "number": "2",
        "name": "D",
        "type": "input",
        "description": "Data input that must meet the setup time before the positive CLK edge and hold time after it, and accepts voltages up to 5.5 V."
      },
      {
        "number": "3",
        "name": "Q̄",
        "type": "output",
        "description": "Complementary (inverted) flip-flop output, the logic inverse of Q; the datasheet's text extraction prints this pin as 'Q' without the overbar, so the overbar is inferred from the function table."
      },
      {
        "number": "4",
        "name": "GND",
        "type": "power_in",
        "description": "Device ground reference."
      },
      {
        "number": "5",
        "name": "Q",
        "type": "output",
        "description": "Flip-flop output with ±24-mA drive at 3.3 V; the output is disabled by the Ioff circuitry when the device is powered down to prevent backflow current."
      },
      {
        "number": "6",
        "name": "CLR",
        "type": "input",
        "description": "Active-low clear input that resets Q low regardless of the other inputs, and must be held high for normal clocked operation."
      },
      {
        "number": "7",
        "name": "PRE",
        "type": "input",
        "description": "Active-low preset input that sets Q high regardless of the other inputs, and must be held high for normal clocked operation."
      },
      {
        "number": "8",
        "name": "VCC",
        "type": "power_in",
        "description": "Supply pin; the device is specified for 1.65 V to 5.5 V operation, and unused inputs must be held at VCC or GND."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The text extraction drops the overbars: pin 3 is printed as 'Q' and pin 5 as 'Q'. Pin 5 is taken as ; The pinout comes from the DCU top-view diagram on page 1, and the pin positions were reconstructed f"
        ],
        "pages_sent": 15,
        "cost_usd": 0.0585,
        "at": "2026-10-11T12:54:03"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/sn74lvc2g74-q1",
        "pages": 15,
        "sha256": "d2e8f45be0ddf94d",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
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        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "353552981eef35cb93635057d4aeb89aef22648c77af6fd095e328bfe6b834bd",
        "checked": "2026-10-11",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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        "sha256": "5445f2de8359992393e0384bc58262970d7694f7eb178490f84fd27acfc5ebed",
        "checked": "2026-10-11",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "VSSOP-8",
      "Category": "Logic",
      "Pins": "8"
    }
  },
  "variants": [],
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  "discovery_triggers": [
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  "discovery_pitch": "CLVC2G74QDCURG4Q1 (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
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