component
CLVC2G74QDCURG4Q1
Public Made by Adomby adom
Texas Instruments Flip Flops, VSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCLVC2G74QDCURG4Q1
Texas Instruments · Flip Flops · VSSOP-8
CLVC2G74QDCURG4Q1 from Texas Instruments, in a VSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CLK | input | Positive-edge clock input; data at D is transferred to the outputs on the positive-going edge, and the minimum CLK pulse width is 3.3 ns at VCC = 5 V (6.2 ns at 1.8 V). |
| 2 | D | input | Data input that must meet the setup time before the positive CLK edge and hold time after it, and accepts voltages up to 5.5 V. |
| 3 | Q̄ | output | Complementary (inverted) flip-flop output, the logic inverse of Q; the datasheet's text extraction prints this pin as 'Q' without the overbar, so the overbar is inferred from the function table. |
| 4 | GND | power_in | Device ground reference. |
| 5 | Q | output | Flip-flop output with ±24-mA drive at 3.3 V; the output is disabled by the Ioff circuitry when the device is powered down to prevent backflow current. |
| 6 | CLR | input | Active-low clear input that resets Q low regardless of the other inputs, and must be held high for normal clocked operation. |
| 7 | PRE | input | Active-low preset input that sets Q high regardless of the other inputs, and must be held high for normal clocked operation. |
| 8 | VCC | power_in | Supply pin; the device is specified for 1.65 V to 5.5 V operation, and unused inputs must be held at VCC or GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-8 |
| Category | Logic |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
CLVC2G74QDCURG4Q1 - Footprint:
Package_SO:VSSOP-8_2.3x2mm_P0.5mm - 3D model: VSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
clvc2g74qdcurg4q1-etched.step/clvc2g74qdcurg4q1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);clvc2g74qdcurg4q1.step/clvc2g74qdcurg4q1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (15 pp, sha256
d2e8f45be0ddf94d, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).