# CJQ4435A

**Changjing** · MOSFETs · SOP-8

CJQ4435A from Changjing, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source terminal of the P-channel MOSFET, rated for a drain-source voltage of -30 V and gate-source voltage of ±20 V. |
| 2 | S | passive | Source terminal of the P-channel MOSFET, rated for a drain-source voltage of -30 V and gate-source voltage of ±20 V. |
| 3 | S | passive | Source terminal of the P-channel MOSFET, rated for a drain-source voltage of -30 V and gate-source voltage of ±20 V. |
| 4 | G | input | Gate terminal; the datasheet gives a gate-source voltage limit of ±20 V. |
| 5 | D | passive | Drain terminal; continuous drain current is rated -9.9 A and pulsed drain current -40 A. |
| 6 | D | passive | Drain terminal; continuous drain current is rated -9.9 A and pulsed drain current -40 A. |
| 7 | D | passive | Drain terminal; continuous drain current is rated -9.9 A and pulsed drain current -40 A. |
| 8 | D | passive | Drain terminal; continuous drain current is rated -9.9 A and pulsed drain current -40 A. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Changjing |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | -30 |  |  | V |  | 1 |
| Gate-Source Voltage | VGS | -20 |  | 20 | V |  | 1 |
| Continuous Drain Current | ID | -9.9 |  |  | A |  | 1 |
| Pulsed Drain Current | IDM | -40 |  |  | A |  | 1 |
| Single Pulsed Avalanche Energy | EAS |  |  | 76 | mJ |  | 1 |
| Power Dissipation | PD |  |  | 2.5 | W |  | 1 |
| Operating Junction and Storage Temperature Range | TJ ,TSTG | -55 |  | 150 | ℃ |  | 1 |
| Maximum Junction-to-Ambient thermal resistance | RθJA |  | 33 | 50 | ℃/W | t ≤ 10s | 1 |
| Maximum Junction-to-Ambient thermal resistance | RθJA |  | 63 | 95 | ℃/W | Steady State | 1 |
| Drain-source breakdown voltage | V(BR) DSS | -30 |  |  | V | VGS = 0V, ID =-250uA | 2 |
| Zero gate voltage drain current | IDSS | -1 |  |  | µA | VDS =-30V, VGS =0V; TJ =25℃ | 2 |
| Zero gate voltage drain current | IDSS | -100 |  |  | µA | VDS =-30V, VGS =0V; TJ =125℃ | 2 |
| Gate-body leakage current | IGSS | -100 |  | 100 | nA | VDS =0V, VGS =±20V | 2 |
| Gate-threshold voltage | VGS(th) | -1.1 | -1.6 | -2.2 | V | VDS =VGS, ID =-250µA | 2 |
| Static drain-source on-state resistance | RDS(on) |  | 17 | 25 | mΩ | VGS =-4.5V, ID =-6.9A | 2 |
| Continuous drain-source diode forward current | IS | -9.9 |  |  | A |  | 2 |
| Pulsed drain-source diode forward current | ISM | -40 |  |  | A |  | 2 |

## CAD (KiCad official)

- Symbol: `CJQ4435A`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `cjq4435a-etched.step` / `cjq4435a-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cjq4435a.step` / `cjq4435a.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Changjing datasheet](docs/cjq4435a-datasheet.pdf) (6 pp, sha256 `7998a316a71344f9`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/cjq4435a-datasheet.pdf)