# CJL6602

**Changjing** · MOSFETs · SOT-23-6L

CJL6602 from Changjing, in a SOT-23-6L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G1 | input | Gate of MOSFET 1; gate-source voltage limit is ±12 V. |
| 2 | S2 | passive | Source of MOSFET 2 (pin labelled S2 in the equivalent circuit). |
| 3 | G2 | input | Gate of MOSFET 2; gate-source voltage limit is ±12 V. |
| 4 | D2 | passive | Drain of MOSFET 2; drain-source voltage rating is 30 V (N-channel) or -30 V (P-channel). |
| 5 | S1 | passive | Source of MOSFET 1 (pin labelled S1 in the equivalent circuit). |
| 6 | D1 | passive | Drain of MOSFET 1; drain-source voltage rating is 30 V (N-channel) or -30 V (P-channel). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Changjing |
| Package | SOT-23-6L |
| Category | Triode/MOS Tube/Transistor |
| Pins | 6 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| N-ch Drain-source voltage | VDS |  |  | 30 | V | TA=25℃, N-channel | 1 |
| P-ch Drain-source voltage | VDS | -30 |  |  | V | TA=25℃, P-channel | 1 |
| N-ch Gate-source voltage | VGS | -12 |  | 12 | V | TA=25℃, N-channel, ±12 | 1 |
| P-ch Gate-source voltage | VGS | -12 |  | 12 | V | TA=25℃, P-channel, ±12 | 1 |
| N-ch Continuous drain current | ID |  |  | 3.4 | A | TA=25℃, N-channel, t≤10s, 1in2 FR-4 | 1 |
| P-ch Continuous drain current | ID | -2.3 |  |  | A | TA=25℃, P-channel, t≤10s, 1in2 FR-4 | 1 |
| N-ch Pulsed drain current | IDM |  |  | 30 | A | TA=25℃, N-channel | 1 |
| P-ch Pulsed drain current | IDM | -30 |  |  | A | TA=25℃, P-channel | 1 |
| Power dissipation | PD |  |  | 0.35 | W | TA=25℃, both channels | 1 |
| Junction and storage temperature range | TJ,Tstg | -55 |  | 150 | ℃ | -55~+150 | 1 |
| Thermal resistance junction to ambient | RθJA |  | 357 |  | ℃/W | 1in2 FR-4, 2oz Cu, still air, TA=25°C | 1 |
| N-ch Drain-source breakdown voltage | V(BR)DSS | 30 |  |  | V | VGS = 0V, ID =250µA | 2 |
| N-ch Zero gate voltage drain current | IDSS |  |  | 1 | µA | VDS =24V,VGS = 0V | 2 |
| N-ch Gate-source leakage current | IGSS | -100 |  | 100 | nA | VGS =±12V, VDS = 0V | 2 |
| N-ch Drain-source on-resistance | RDS(on) |  | 45 | 60 | mΩ | VGS =10V, ID =3A | 2 |
| N-ch Drain-source on-resistance | RDS(on) |  | 50 | 75 | mΩ | VGS =4.5V, ID =3A | 2 |
| N-ch Drain-source on-resistance | RDS(on) |  | 60 | 115 | mΩ | VGS =2.5V, ID =2A | 2 |
| N-ch Gate threshold voltage | VGS(th) | 0.6 |  | 1.4 | V | VDS =VGS, ID =250µA | 2 |
| N-ch Diode forward voltage | VSD |  |  | 1 | V | IS=1A,VGS=0V | 2 |
| P-ch Drain-source breakdown voltage | V(BR)DSS | -30 |  |  | V | VGS = 0V, ID =-250µA | 2 |
| P-ch Zero gate voltage drain current | IDSS | -1 |  |  | µA | VDS =-24V,VGS = 0V | 2 |
| P-ch Gate-source leakage current | IGSS | -100 |  | 100 | nA | VGS =±12V, VDS = 0V | 2 |
| P-ch Drain-source on-resistance | RDS(on) |  | 75 | 135 | mΩ | VGS =-10V, ID =-2.3A | 2 |
| P-ch Drain-source on-resistance | RDS(on) |  | 95 | 185 | mΩ | VGS =-4.5V, ID =-2A | 2 |
| P-ch Drain-source on-resistance | RDS(on) |  | 140 | 265 | mΩ | VGS =-2.5V, ID =-1A | 2 |
| P-ch Gate threshold voltage | VGS(th) | -1.4 |  | -0.6 | V | VDS =VGS, ID =-250µA | 2 |
| P-ch Diode forward voltage | VDS | -1 |  |  | V | IS=-1A,VGS=0V | 2 |
| N-ch Forward transconductance | gFS |  | 5 |  | S | VDS =5V, ID =3A | 2 |
| P-ch Forward transconductance | gFS |  | 4.5 |  | S | VDS =-5V, ID =-2.3A | 2 |
| N-ch Input capacitance | Ciss |  | 390 |  | pF | VGS =0V,VDS =15V ,f =1MHz | 2 |
| N-ch Output capacitance | Coss |  | 54.5 |  | pF | VGS =0V,VDS =15V ,f =1MHz | 2 |
| N-ch Reverse transfer capacitance | Crss |  | 41 |  | pF | VGS =0V,VDS =15V ,f =1MHz | 2 |
| N-ch Gate resistance | Rg |  | 3 |  | Ω | VGS =0V,VDS =0V,f =1MHz | 2 |
| P-ch Input capacitance | Ciss |  | 409 |  | pF | VGS =0V,VDS =-15V,f =1MHz | 2 |
| P-ch Output capacitance | Coss |  | 55 |  | pF | VGS =0V,VDS =-15V,f =1MHz | 2 |
| P-ch Reverse transfer capacitance | Crss |  | 42 |  | pF | VGS =0V,VDS =-15V,f =1MHz | 2 |
| P-ch Gate resistance | Rg |  | 12 |  | Ω | VGS =0V,VDS =0V,f =1MHz | 2 |
| N-ch Turn-on delay time | td(on) |  | 4 |  | ns | VGS=10V,VDS=15V, RL=5Ω,RGEN=6Ω | 2 |
| N-ch Turn-on rise time | tr |  | 2 |  | ns | VGS=10V,VDS=15V, RL=5Ω,RGEN=6Ω | 2 |
| N-ch Turn-off delay time | td(off) |  | 22 |  | ns | VGS=10V,VDS=15V, RL=5Ω,RGEN=6Ω | 2 |
| N-ch Turn-off fall time | tf |  | 3 |  | ns | VGS=10V,VDS=15V, RL=5Ω,RGEN=6Ω | 2 |
| P-ch Turn-on delay time | td(on) |  | 13 |  | ns | VGS=-10V,VDS=-15V, RL=6Ω,RGEN=6Ω | 2 |
| P-ch Turn-on rise time | tr |  | 10 |  | ns | VGS=-10V,VDS=-15V, RL=6Ω,RGEN=6Ω | 2 |
| P-ch Turn-off delay time | td(off) |  | 28 |  | ns | VGS=-10V,VDS=-15V, RL=6Ω,RGEN=6Ω | 2 |
| P-ch Turn-off fall time | tf |  | 13 |  | ns | VGS=-10V,VDS=-15V, RL=6Ω,RGEN=6Ω | 2 |

## CAD (KiCad official)

- Symbol: `CJL6602`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6L (KiCad packages3D, STEP)
- 3D model files: `cjl6602-etched.step` / `cjl6602-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cjl6602.step` / `cjl6602.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Changjing datasheet](docs/cjl6602-datasheet.pdf) (6 pp, sha256 `145a50c14133106b`, retrieved 2026-10-22, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/cjl6602-datasheet.pdf)