CJC8990

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  "type": "component",
  "slug": "cjc8990",
  "title": "CJC8990",
  "brief": "ESHINE Signal Switches / Encoders & Decoders / Multiplexers, QFN4x4-20. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
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    "logic",
    "cjc8990"
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  "component": {
    "mpn": "CJC8990",
    "manufacturer": "ESHINE",
    "package": "QFN4x4-20",
    "pin_count": 20,
    "category": "Logic",
    "subcategory": "Signal Switches / Encoders & Decoders / Multiplexers",
    "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2308111357_ESHINE-CJC8990_C7431491.pdf",
    "parts": {
      "symbol": "cjc8990.kicad_sym",
      "footprint": "cjc8990.kicad_mod",
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      "lbr": "cjc8990.lbr"
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    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "DCVDD",
        "type": "power_in",
        "description": "Digital core supply and digital I/O supply. Operating range 1.8 V to 3.3 V (core can be run down to 1.5 V). Absolute max 3.6 V; decouple locally."
      },
      {
        "number": "2",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital ground, return path for both DCVDD and DBVDD. Must be within 0.3 V of AGND."
      },
      {
        "number": "3",
        "name": "BCLK",
        "type": "bidirectional",
        "description": "Audio interface bit clock. Direction depends on master/slave mode of the digital audio interface (output in master mode, input in slave mode)."
      },
      {
        "number": "4",
        "name": "DACDAT",
        "type": "input",
        "description": "DAC digital audio data input to the stereo DAC over the audio interface."
      },
      {
        "number": "5",
        "name": "LRC",
        "type": "bidirectional",
        "description": "Audio interface left/right (word) clock. Direction depends on master/slave mode (output in master mode, input in slave mode)."
      },
      {
        "number": "6",
        "name": "ADCDAT",
        "type": "output",
        "description": "ADC digital audio data output from the stereo ADC over the audio interface."
      },
      {
        "number": "7",
        "name": "HPCOM",
        "type": "output",
        "description": "LOUT/ROUT common-mode output used as the ground reference for capless (BTL-style) headphone connection. Nominally biased around mid-rail (VMID)."
      },
      {
        "number": "8",
        "name": "ROUT",
        "type": "output",
        "description": "Right analogue output for headphone or line-out use, driven by the on-chip headphone driver (16 Ω capable)."
      },
      {
        "number": "9",
        "name": "LOUT",
        "type": "output",
        "description": "Left analogue output for headphone or line-out use, driven by the on-chip headphone driver (16 Ω capable)."
      },
      {
        "number": "10",
        "name": "HPGND",
        "type": "power_in",
        "description": "Ground return for the analogue output (headphone) drivers LOUT/ROUT. Keep low-impedance to speaker/headphone jack ground."
      },
      {
        "number": "11",
        "name": "HPVDD",
        "type": "power_in",
        "description": "Supply for the analogue output drivers (LOUT, ROUT, MONOUT). Operating range 1.8 V to 3.3 V, absolute max 3.6 V; decouple locally."
      },
      {
        "number": "12",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analogue supply for the ADC/DAC and reference circuitry. Operating range 1.8 V to 3.3 V, absolute max 3.6 V; decouple locally."
      },
      {
        "number": "13",
        "name": "AGND",
        "type": "power_in",
        "description": "Analogue ground, return path for AVDD. Must be within 0.3 V of DGND."
      },
      {
        "number": "14",
        "name": "VREF",
        "type": "passive",
        "description": "Reference-voltage decoupling capacitor pin. Connect an external decoupling capacitor to AGND; do not load with any signal current."
      },
      {
        "number": "15",
        "name": "VMID",
        "type": "passive",
        "description": "Mid-rail voltage decoupling capacitor pin (AVDD/2 bias). Connect an external decoupling capacitor to AGND."
      },
      {
        "number": "16",
        "name": "MICINP",
        "type": "input",
        "description": "Positive analogue microphone input to the PGA + MIC boost front end."
      },
      {
        "number": "17",
        "name": "MICINN",
        "type": "input",
        "description": "Negative analogue microphone input (also usable as AUXIN per the block diagram) to the PGA + MIC boost front end."
      },
      {
        "number": "18",
        "name": "SDIN",
        "type": "bidirectional",
        "description": "Control-interface data input; also drives the 2-wire (I²C-style) acknowledge output. Open-drain during ACK phase; requires external pull-up when used in 2-wire mode."
      },
      {
        "number": "19",
        "name": "SCLK",
        "type": "input",
        "description": "Control-interface clock input for the 2-wire (I²C-style) register interface."
      },
      {
        "number": "20",
        "name": "MCLK",
        "type": "input",
        "description": "Master clock input. Supports 256fs/384fs or USB master clock rates (12 MHz, 24 MHz, 12.288 MHz, 24.576 MHz); sample rates 8 kHz to 96 kHz are generated internally without an external PLL."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2308111357_ESHINE-CJC8990_C7431491.pdf",
        "pages": 73,
        "sha256": "d9d5dd68b3ee86fc",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 20,
        "described": 20,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
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      "footprint": "viewers/footprint.html"
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        "zmin_mm": 0,
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        "checked": "2026-10-07",
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  },
  "metadata": {
    "specs": {
      "Manufacturer": "ESHINE",
      "Package": "QFN4x4-20",
      "Category": "Logic",
      "Pins": "20"
    }
  },
  "sections": [
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  "discovery_triggers": [
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  "discovery_pitch": "CJC8990 (ESHINE) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
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  "visibility": {
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  "updated_at": "2026-09-24T19:12:50.076Z"
}