CJC4334H

{
  "slug": "cjc4334h",
  "version": "0.1.0",
  "type": "component",
  "description": "ESHINE Digital To Analog Converters (DAC), SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
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    "data acquisition",
    "cjc4334h",
    "factory-2.0.0",
    "extractor-text"
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  "dependencies": {},
  "hero": {
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    "path": "docs/hero.png"
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    "cjc4334h.step",
    "cjc4334h.lbr",
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    "viewers/footprint.html",
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  "component": {
    "mpn": "CJC4334H",
    "manufacturer": "ESHINE",
    "package": "SOP-8",
    "pin_count": 8,
    "category": "Data Acquisition",
    "subcategory": "Digital To Analog Converters (DAC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8604435438493057024",
    "parts": {
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      "lbr": "cjc4334h.lbr"
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    "distributor_links": {
      "lcsc": "C41417670"
    },
    "distributor_check": {
      "checked_at": "2026-11-07T04:11:30Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
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      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "SDIN",
        "type": "input",
        "description": "Serial Audio Data Input accepts two's complement serial audio data."
      },
      {
        "number": "2",
        "name": "SCLK",
        "type": "input",
        "description": "Serial Clock provides the clock for the serial audio interface."
      },
      {
        "number": "3",
        "name": "LRCK",
        "type": "input",
        "description": "Left/Right Clock determines which channel, left or right, is currently active on the serial audio data line."
      },
      {
        "number": "4",
        "name": "MCLK",
        "type": "input",
        "description": "Master Clock is the clock source for the delta-sigma modulator and digital filters."
      },
      {
        "number": "5",
        "name": "AOUTL",
        "type": "output",
        "description": "Analog left line output whose full-scale level is specified in the Analog Characteristics (2.7 to 2.9 VPP at 0 dBFS, 2.8 VPP typical)."
      },
      {
        "number": "6",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference for the device; all voltages are referenced to GND."
      },
      {
        "number": "7",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive analog power supply (3.0 V to 3.6 V, 3.3 V typical) that also feeds the regulator for the digital core logic."
      },
      {
        "number": "8",
        "name": "AOUTR",
        "type": "output",
        "description": "Analog right line output whose full-scale level is specified in the Analog Characteristics (2.7 to 2.9 VPP at 0 dBFS, 2.8 VPP typical)."
      }
    ],
    "provenance": {
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        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
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        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet pin table lists VDD (pin 7) with I/O type 'O', which conflicts with its function as a ; The pin-out is taken from the pin description table on page 5 (pins 1-8, SOP8 variant). The pin-1 or"
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        "cost_usd": 0.0568,
        "at": "2026-11-07T04:11:13"
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        "pages": 13,
        "sha256": "d5bd214eddd892c5",
        "source_tier": "lcsc"
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      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
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        "checked": "2026-11-07",
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}