component

CJC4334H

Public Made by Adom

by adom

ESHINE Digital To Analog Converters (DAC), SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CJC4334H

ESHINE · Digital To Analog Converters (DAC) · SOP-8

CJC4334H from ESHINE, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SDIN input Serial Audio Data Input accepts two's complement serial audio data.
2 SCLK input Serial Clock provides the clock for the serial audio interface.
3 LRCK input Left/Right Clock determines which channel, left or right, is currently active on the serial audio data line.
4 MCLK input Master Clock is the clock source for the delta-sigma modulator and digital filters.
5 AOUTL output Analog left line output whose full-scale level is specified in the Analog Characteristics (2.7 to 2.9 VPP at 0 dBFS, 2.8 VPP typical).
6 GND power_in Ground reference for the device; all voltages are referenced to GND.
7 VDD power_in Positive analog power supply (3.0 V to 3.6 V, 3.3 V typical) that also feeds the regulator for the digital core logic.
8 AOUTR output Analog right line output whose full-scale level is specified in the Analog Characteristics (2.7 to 2.9 VPP at 0 dBFS, 2.8 VPP typical).

Key specifications

Parameter Value
Manufacturer ESHINE
Package SOP-8
Category Data Acquisition
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC power supply Analog power VDD 3 3.3 3.6 V 5
Ambient operating temperature (power applied) TA -40 85 ℃ power applied 5
DC power supply Low voltage analog power VDD -0.3 3.6 V 5
Input current, any pin except supplies Iin -10 10 mA any pin except supplies 5
Digital input voltage, Digital interface VIN-L -0.3 V Digital interface (Note 2) 5
Output Level 2.7 2.8 2.9 VPP 0dBFS 6
Master Clock Frequency fCLK 2 50 MHz 6
Duty Cycle dCLK 45 55 % 6
Input Sample Rate Fs 30 200 kHz All MCLK/LRCK ratios combined 6
Signal to Noise Ratio, A-weighted SNR 87 91 92 dB RL = 10kΩ, A-weighted 6
Signal to Noise Ratio, Un-weighted SNR 85 89 90 dB RL = 10kΩ, Un-weighted 6
Total Harmonic Distortion Plus Noise THD+N 83 85 87 dB RL = 10kΩ 6
Channel Separation 100 114 dB 1kHz 6
Input Leakage -0.9 0.9 A 6
DAC Digital Filter Passband (±0.01dB) PB 0 22.05 kHz ±0.01dB 7
DAC Digital Filter Passband (−6.0dB) PB 20 kHz −6.0dB 7
Passband Ripple PR -0.01 0.01 dB 7
Frequency Response, 0~20 kHz FR -0.02 0.02 dB 0~20 kHz 7
Frequency Response, ~40 kHz FR -1 1 dB ~40 kHz (Note 5: fs=96kHz) 7

CAD (KiCad official)

  • Symbol: CJC4334H
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: cjc4334h-etched.step / cjc4334h-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cjc4334h.step / cjc4334h.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ESHINE datasheet (13 pp, sha256 d5bd214eddd892c5, retrieved 2026-11-07, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF