[DEPRECATED] Chip Fetcher → adom-chip-fetcher
Public Made by Adomby adom
DEPRECATED — use adom/adom-chip-fetcher. No longer maintained.
Skills
The skills this repo ships, by tier, each with a quick health read. Install the user skills with:
adom-wiki skills install adom/chip-fetcherdev-skills/ or publish-skills/, so a contributor (or their AI) has no in-repo guide to build, debug, or publish it. Consider adding them; they stay source-only and never ship in the tarball.Download manufacturer-grade chip CAD bundles (STEP + KiCad symbol + KiCad footprint + Altium IntLib + Fusion .lbr + datasheet) into a structured library by driving Chrome via pup on the user's desktop. Manufacturer-first sourcing ladder, then SnapMagic → Mouser → DigiKey → Arrow → CSE/UL → LCSC (LCSC is last resort, avoid). Handles NRND/EOL lifecycle and multi-package variants. Use when the user wants to fetch a chip's 3D model, build a chip test library, source CAD files for a part, grab STEP files, populate a chip-pads test set, or "fetch <MPN>". Trigger words — chip-fetcher, fetch chip, chip cad, chip step, chip footprint, fetch step file, snapeda fetch, snapmagic fetch, altium intlib, fusion 360 lbr, ultralibrarian fetch, mouser fetch, digikey fetch, nrnd alternate, ti cad download, st cad download, nxp cad download, manufacturer chip step, mpn fetch.
Download manufacturer-grade chip CAD bundles (STEP + KiCad symbol + KiCad footprint + Altium IntLib + Fusion .lbr + datasheet) into a structured library by driving Chrome via pup on the user's desktop. Manufacturer-first sourcing ladder, then SnapMagic → Mouser → DigiKey → Arrow → CSE/UL → LCSC (LCSC is last resort, avoid). Handles NRND/EOL lifecycle and multi-package variants. Use when the user wants to fetch a chip's 3D model, build a chip test library, source CAD files for a part, grab STEP files, populate a chip-pads test set, or "fetch <MPN>". Trigger words — chip-fetcher, fetch chip, chip cad, chip step, chip footprint, fetch step file, snapeda fetch, snapmagic fetch, altium intlib, fusion 360 lbr, ultralibrarian fetch, mouser fetch, digikey fetch, nrnd alternate, ti cad download, st cad download, nxp cad download, manufacturer chip step, mpn fetch.
How chip-fetcher navigates DigiKey for a chip's CAD models — and the recovery playbook for when DigiKey BLOCKS pup automation (its anti-bot trips periodically and serves a challenge/block page instead of the product page). Read before a DigiKey fetch, and especially when a DigiKey fetch returns a block/challenge instead of the part. Trigger words: digikey, digikey blocked, digikey captcha, digikey anti-bot, digikey challenge page, digikey cad, digikey step, digikey 3d model, digikey access denied, digikey verify human.
The generic approach for pulling CAD straight from a chip MAKER's own site (TI, ST, NXP, Nordic, Microchip, Analog…) — the top rung of the ladder, where the STEP is richest and most authoritative. Read before a manufacturer-direct fetch, or to add a maker-specific sub-flow. Trigger words: manufacturer cad, ti cad download, st cad, nxp cad, nordic cad, microchip cad, analog devices cad, manufacturer step, product page cad, maker site.
How chip-fetcher pulls CAD + stock/lifecycle from Mouser. Mouser is also the authoritative stock/price/lifecycle source (stock.json). Read before a Mouser fetch or stock check. Trigger words: mouser, mouser cad, mouser step, mouser stock, mouser lifecycle, mouser 3d model, mouser blocked.
How chip-fetcher pulls CAD from NXP (nxp.com) — the Design Resources / CAD section, sometimes behind an export-control click-through. Read before an NXP-direct fetch. Trigger words: nxp, nxp.com, nxp cad, nxp step, nxp symbol footprint, nxp export control, nxp blocked.
How chip-fetcher navigates SnapEDA (SnapMagic) to download a chip's CAD bundle — symbol, footprint, 3D STEP, and the Fusion/Eagle .lbr + Altium IntLib — through a logged-in pup Chrome profile. The canonical template for a source-site skill. Read before driving a SnapEDA fetch, or when a SnapEDA fetch stalls at the login wall or the download button. Trigger words: snapeda, snapmagic, snapeda login, snapeda download, snapeda blocked, snapeda step, snapeda symbol footprint, snapeda lbr, snapeda intlib.
How chip-fetcher pulls CAD from STMicroelectronics (st.com) — the CAD Resources tab on a product page, behind a free myST account for some downloads. Read before an ST-direct fetch. Trigger words: st, stm, stmicroelectronics, st.com, st cad, st step, stm32 cad, myst login, st blocked.
How chip-fetcher pulls CAD from Texas Instruments (ti.com) — the "CAD/Symbols, Footprints & 3D Models" widget on a product page (an Ultra Librarian embed) and the native STEP. Read before a TI-direct fetch. Trigger words: ti, texas instruments, ti.com, ti cad, ti step, ti symbol footprint, ti ultra librarian, ti.com blocked.
How chip-fetcher navigates Ultra Librarian / Component Search Engine (CSE/UL) — a late-ladder rung with broad coverage behind a login + format picker. Read before a CSE/UL fetch. Trigger words: ultra librarian, ultralibrarian, cse_ul, component search engine, samacsys, ul download, ul step, ul blocked.
No dev skills in this repo.
How to build, debug, and test this app. Source-only (dev-skills/), never shipped in the tarball.
No publish skills in this repo.
The app-to-wiki publish glue. Source-only (publish-skills/), never shipped in the tarball.
Health: the size chip is green when right-sized, yellow when getting long, red when the model likely skims it. A green check is a passed preamble/structure signal; an amber mark is a gentle nudge, not a hard failure.