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Ray Publish 0.1.0 978e361 8d ago
{
  "slug": "ch32v003a4m6",
  "version": "0.1.0",
  "type": "component",
  "description": "WCH Jiangsu Qin Heng Microcontrollers (MCU/MPU/SOC), SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "ch32v003a4m6",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ch32v003a4m6.kicad_sym",
    "ch32v003a4m6.kicad_mod",
    "ch32v003a4m6.glb",
    "ch32v003a4m6.step",
    "ch32v003a4m6.lbr",
    "docs/hero.png",
    "docs/ch32v003a4m6-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ch32v003a4m6-hero.glb",
    "ch32v003a4m6-hero.overlay.json",
    "ch32v003a4m6-etched.glb"
  ],
  "component": {
    "mpn": "CH32V003A4M6",
    "manufacturer": "WCH Jiangsu Qin Heng",
    "package": "SOP-16",
    "pin_count": 16,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8757221805532684288",
    "parts": {
      "symbol": "ch32v003a4m6.kicad_sym",
      "footprint": "ch32v003a4m6.kicad_mod",
      "model_3d": "ch32v003a4m6-hero.glb",
      "model_3d_plain": "ch32v003a4m6-etched.glb",
      "model_3d_step": "ch32v003a4m6-etched.step",
      "model_3d_step_plain": "ch32v003a4m6.step",
      "lbr": "ch32v003a4m6.lbr"
    },
    "distributor_links": {
      "lcsc": "C5346357"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T20:31:06Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "PC1",
        "type": "bidirectional",
        "description": "5V-tolerant (FT) I/O with default function PC1 and I2C SDA / SPI NSS as default alternates; remap options include TIM1 BKIN, TIM2 CH4 / CH1ETR and USART RX."
      },
      {
        "number": "2",
        "name": "PC2",
        "type": "bidirectional",
        "description": "5V-tolerant (FT) I/O with default function PC2 and I2C SCL / USART RTS / TIM1 BKIN as default alternates; remap options include ADC ETR, TIM2 CH2 and TIM1 ETR."
      },
      {
        "number": "3",
        "name": "PC3",
        "type": "bidirectional",
        "description": "General-purpose I/O (no FT rating stated) with default function PC3 and TIM1 CH3 as default alternate; remap options include TIM1 CH1N and USART CTS."
      },
      {
        "number": "4",
        "name": "PC4",
        "type": "bidirectional",
        "description": "Analog-capable I/O (I/O/A) with default function PC4, ADC input A2, TIM1 CH4 and MCO clock output as default alternates; remap options include TIM1 CH2N and TIM1 CH1."
      },
      {
        "number": "5",
        "name": "PC6",
        "type": "bidirectional",
        "description": "5V-tolerant (FT) I/O with default function PC6 and SPI MOSI as default alternate; remap options include TIM1 CH1, USART CTS and I2C SDA."
      },
      {
        "number": "6",
        "name": "PC7",
        "type": "bidirectional",
        "description": "General-purpose I/O (no FT rating stated) with default function PC7 and SPI MISO as default alternate; remap options include TIM1 CH2, TIM2 CH2 and USART RTS."
      },
      {
        "number": "7",
        "name": "PD1",
        "type": "bidirectional",
        "description": "Analog-capable I/O (I/O/A) whose SWIO single-wire debug function is enabled by default after power-on or reset; the datasheet notes HSI must be enabled when using the single-wire debug interface."
      },
      {
        "number": "8",
        "name": "PD4",
        "type": "bidirectional",
        "description": "Analog-capable I/O (I/O/A) with default function PD4, ADC input A7, USART clock UCK and TIM2 CH1 ETR as default alternates; OPA output OPO is also available."
      },
      {
        "number": "9",
        "name": "PD5",
        "type": "bidirectional",
        "description": "Analog-capable I/O (I/O/A) with default function PD5, ADC input A5 and USART TX as default alternates; remap options include TIM2 CH4 and USART RX."
      },
      {
        "number": "10",
        "name": "PD6",
        "type": "bidirectional",
        "description": "Analog-capable I/O (I/O/A) with default function PD6, ADC input A6 and USART RX as default alternates; remap options include TIM2 CH3 and USART TX."
      },
      {
        "number": "11",
        "name": "PD7",
        "type": "bidirectional",
        "description": "Analog-capable I/O (I/O/A) with default function PD7 that also serves as the NRST external reset input (internal pull-up 35/45/55 kΩ); NRST input thresholds are given in section 3.3.10."
      },
      {
        "number": "12",
        "name": "PA1",
        "type": "bidirectional",
        "description": "Analog-capable I/O (I/O/A) with default function PA1, ADC input A1 and TIM1 CH2 as default alternates; the pin also carries OSCI (HSE oscillator input) and OPA N0."
      },
      {
        "number": "13",
        "name": "PA2",
        "type": "bidirectional",
        "description": "Analog-capable I/O (I/O/A) with default function PA2, ADC input A0 and TIM1 CH2N as default alternates; the pin also carries OSCO (HSE oscillator output) and OPA P0."
      },
      {
        "number": "14",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground reference; the datasheet states all voltages are referenced to VSS and the VDD-VSS absolute maximum is 5.5 V."
      },
      {
        "number": "15",
        "name": "VDD",
        "type": "power_in",
        "description": "Supply pin powering the I/O pins and internal regulator, rated 2.7-5.5 V (2.8 V minimum recommended when using the ADC; absolute maximum VDD-VSS of 5.5 V)."
      },
      {
        "number": "16",
        "name": "PC0",
        "type": "bidirectional",
        "description": "General-purpose I/O (no FT rating stated) with default function PC0 and TIM2 CH3 / USART TX as default alternates; remap options include SPI NSS and TIM1 CH3."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin numbers and default/alternate functions were taken from the SOP16 column of Table 2-1 (page 11).; Ports PC5, PD0, PD2 and PD3 are not bonded out on the SOP16 package (shown as '-' in the SOP16 colum; Pin types were mapped to KiCad ERC classes: I/O pins as bidirectional, VSS as power_in (ground), and"
        ],
        "pages_sent": 31,
        "cost_usd": 0.1465,
        "at": "2026-10-18T20:28:46"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8757221805532684288",
        "pages": 31,
        "sha256": "2c05b25a3ef9269c",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ch32v003a4m6.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ch32v003a4m6-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "bcc6db15de58ea8ded346853859135f7616f1b21405775a88f58b88c655cc15b",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}