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CH32V003A4M6

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WCH Jiangsu Qin Heng Microcontrollers (MCU/MPU/SOC), SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CH32V003A4M6

WCH Jiangsu Qin Heng · Microcontrollers (MCU/MPU/SOC) · SOP-16

CH32V003A4M6 from WCH Jiangsu Qin Heng, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PC1 bidirectional 5V-tolerant (FT) I/O with default function PC1 and I2C SDA / SPI NSS as default alternates; remap options include TIM1 BKIN, TIM2 CH4 / CH1ETR and USART RX.
2 PC2 bidirectional 5V-tolerant (FT) I/O with default function PC2 and I2C SCL / USART RTS / TIM1 BKIN as default alternates; remap options include ADC ETR, TIM2 CH2 and TIM1 ETR.
3 PC3 bidirectional General-purpose I/O (no FT rating stated) with default function PC3 and TIM1 CH3 as default alternate; remap options include TIM1 CH1N and USART CTS.
4 PC4 bidirectional Analog-capable I/O (I/O/A) with default function PC4, ADC input A2, TIM1 CH4 and MCO clock output as default alternates; remap options include TIM1 CH2N and TIM1 CH1.
5 PC6 bidirectional 5V-tolerant (FT) I/O with default function PC6 and SPI MOSI as default alternate; remap options include TIM1 CH1, USART CTS and I2C SDA.
6 PC7 bidirectional General-purpose I/O (no FT rating stated) with default function PC7 and SPI MISO as default alternate; remap options include TIM1 CH2, TIM2 CH2 and USART RTS.
7 PD1 bidirectional Analog-capable I/O (I/O/A) whose SWIO single-wire debug function is enabled by default after power-on or reset; the datasheet notes HSI must be enabled when using the single-wire debug interface.
8 PD4 bidirectional Analog-capable I/O (I/O/A) with default function PD4, ADC input A7, USART clock UCK and TIM2 CH1 ETR as default alternates; OPA output OPO is also available.
9 PD5 bidirectional Analog-capable I/O (I/O/A) with default function PD5, ADC input A5 and USART TX as default alternates; remap options include TIM2 CH4 and USART RX.
10 PD6 bidirectional Analog-capable I/O (I/O/A) with default function PD6, ADC input A6 and USART RX as default alternates; remap options include TIM2 CH3 and USART TX.
11 PD7 bidirectional Analog-capable I/O (I/O/A) with default function PD7 that also serves as the NRST external reset input (internal pull-up 35/45/55 kΩ); NRST input thresholds are given in section 3.3.10.
12 PA1 bidirectional Analog-capable I/O (I/O/A) with default function PA1, ADC input A1 and TIM1 CH2 as default alternates; the pin also carries OSCI (HSE oscillator input) and OPA N0.
13 PA2 bidirectional Analog-capable I/O (I/O/A) with default function PA2, ADC input A0 and TIM1 CH2N as default alternates; the pin also carries OSCO (HSE oscillator output) and OPA P0.
14 VSS power_in Ground reference; the datasheet states all voltages are referenced to VSS and the VDD-VSS absolute maximum is 5.5 V.
15 VDD power_in Supply pin powering the I/O pins and internal regulator, rated 2.7-5.5 V (2.8 V minimum recommended when using the ADC; absolute maximum VDD-VSS of 5.5 V).
16 PC0 bidirectional General-purpose I/O (no FT rating stated) with default function PC0 and TIM2 CH3 / USART TX as default alternates; remap options include SPI NSS and TIM1 CH3.

Key specifications

Parameter Value
Manufacturer WCH Jiangsu Qin Heng
Package SOP-16
Category Embedded Processors & Controllers
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
工作时的环境温度 (operating ambient temperature) TA -40 85 ℃ 14
存储时的环境温度 (storage temperature) TS -40 125 ℃ 14
外部主供电电压 (VDD-VSS) VDD-VSS -0.3 5.5 V 14
FT（耐受 5V）引脚上的输入电压 VIN 5.5 V FT (5V tolerant) pins 14
不同主供电引脚之间的电压差 /ΔVDD_x/ 50 mV 14
不同接地引脚之间的电压差 /ΔVSS_x/ 50 mV 14
ESD 静电放电电压（人体模型） VESD(HBM) 4 KV Human body model, non-contact 14
经过 VDD 电源线的总电流（供应电流） IVDD 100 mA 14
经过 VSS 地线的总电流（流出电流） IVss 80 mA 14
任意 I/O 和控制引脚上的灌电流 IIO 20 mA Sink current, any I/O and control pin 14
任意 I/O 和控制引脚上的输出电流 IIO -20 mA Output current, any I/O and control pin 14
HSE 的 OSC_IN 引脚注入电流 IINJ(PIN) -4 4 mA HSE OSC_IN pin 14
其他引脚的注入电流 IINJ(PIN) -4 4 mA Other pins 14
所有 IO 和控制引脚的总注入电流 ∑IINJ(PIN) -20 20 mA 14
内部 AHB 时钟频率 FHCLK 50 MHz 15
标准工作电压 VDD VDD 2.7 5.5 V 未使用 ADC 15
标准工作电压 VDD VDD 2.8 5.5 V 使用 ADC（建议） 15
环境温度 TA -40 85 ℃ 15
结温度范围 TJ -40 105 ℃ 15
VDD 上升速率 tVDD 0 us/V 15
VDD 下降速率 tVDD 20 us/V 15
上电/掉电复位阈值 上升沿 VPOR/PDR 2.32 2.5 2.68 V 上升沿 15
上电/掉电复位阈值 下降沿 VPOR/PDR 2.3 2.48 2.66 V 下降沿 15
上电复位延时 (reset temporization) tRSTTEMPO 1 1.5 21 mS 上电复位 15
内置参考电压 VREFINT 1.17 1.2 1.23 V TA = -40℃～85℃ 16
内部高速(HSI)RC 振荡器占空比 DuCyHSI 45 50 55 % 19
HSI 振荡器的精度（校准后） ACCHSI -1.2 1.6 % TA = 0℃～70℃ 19
HSI 振荡器的精度（校准后） ACCHSI -2.2 2.2 % TA = -40℃～85℃ 19
HSI 振荡器功耗 IDD(HSI) 120 180 270 uA 19
内部低速(LSI)RC 振荡器频率 FLSI 100 128 150 KHz 19
内部低速(LSI)RC 振荡器占空比 DuTyLSI 45 50 55 % 19
外部时钟频率 FHSE_ext 4 24 25 MHz 18
谐振器频率 FOSC_IN 4 24 25 MHz 使用晶体/陶瓷谐振器 18
页（64 字节）编程时间 tERASE_64 2.4 3.1 ms TA = -20℃～85℃ 19
页（64 字节）擦除时间 tERASE 2.4 3.1 ms TA = -20℃～85℃ 19
16 位的编程时间 tprog 2.4 3.1 ms TA = -20℃～85℃ 19
整片擦除时间 tME 2.4 3.1 ms TA = -20℃～85℃ 19
编程电压 Vprog 2.8 5.5 V 19
FT IO 引脚，输入高电平电压 VIH 5.5 V 20
标准 I/O 脚，输入低电平电压 VIL -0.3 V 20
FT IO 引脚，输入低电平电压 VIL -0.3 V 20
弱上拉等效电阻 RPU 35 45 55 kΩ 20
弱下拉等效电阻 RPD 35 45 55 kΩ 20
输出低电平，8 个引脚吸收电流 VOL 0.4 V TTL 端口，IIO = +8mA，2.7V< VDD <5.5V 20
输出高电平，8 个引脚输出电流 VOH 2.3 V CMOS 端口，IIO = +8mA，2.7V< VDD <5.5V 20
输出低电平，8 个引脚吸收电流 VOL 1.3 V IIO = +20mA 20
输出低电平 VIL(NRST) VIL(NRST) -0.3 V 21
NRST 弱上拉等效电阻 RPU 35 45 55 kΩ 21
最大频率 (MODE 10, 2MHz) Fmax(IO)out 2 MHz CL = 50pF, VDD = 2.7-5.5V 20
最大频率 (MODE 01, 10MHz) Fmax(IO)out 10 MHz CL = 50pF, VDD = 2.7-5.5V 21
最大频率 (MODE 11, 30MHz) Fmax(IO)out 30 MHz CL = 50pF, VDD = 2.7-5.5V 21
EXTI 控制器检测到外部信号的脉冲宽度 tEXTIpw 10 ns 21
外部定时器时钟频率 CH1 至 CH4 FEXT 0 24 MHz fTIMxCLK = 48MHz 21
16 位计数器时钟周期 (内部时钟) tCOUNTER 0.0208 1363 us fTIMxCLK = 48MHz 21
最大可能的计数 tMAX_COUNT 1363 us fTIMxCLK = 48MHz 21
ADC 时钟频率 fADC 1 6 MHz VDD = 2.8 to 5.5V 25
ADC 时钟频率 fADC 1 12 MHz VDD = 3.2 to 5.5V 25
ADC 时钟频率 fADC 1 24 MHz VDD = 4.5 to 5.5V 25

CAD (KiCad official)

  • Symbol: CH32V003A4M6
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOP-16 (KiCad packages3D, STEP)
  • 3D model files: ch32v003a4m6-etched.step / ch32v003a4m6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ch32v003a4m6.step / ch32v003a4m6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: WCH Jiangsu Qin Heng datasheet (31 pp, sha256 2c05b25a3ef9269c, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF