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CDCVF2505PWR

Texas Instruments · Clock Buffers, Drivers, Distributors · TSSOP-8

CDCVF2505PWR from Texas Instruments, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CLKIN input Clock input providing the reference to the integrated PLL; it must have fixed frequency and fixed phase, and a 100 µs stabilization time is required for phase lock after power-up with a valid signal.
2 1Y1 output Clock output that is a low-skew copy of CLKIN with an integrated 25-Ω series damping resistor.
3 1Y0 output Clock output that is a low-skew copy of CLKIN with an integrated 25-Ω series damping resistor.
4 GND power_in Ground.
5 1Y2 output Clock output that is a low-skew copy of CLKIN with an integrated 25-Ω series damping resistor.
6 VDD3.3V power_in 3.3-V supply, recommended range 3 V to 3.6 V, with at least 100 nF local decoupling capacitor.
7 1Y3 output Clock output that is a low-skew copy of CLKIN with an integrated 25-Ω series damping resistor.
8 CLKOUT output Feedback output that completes the internal PLL feedback loop; do not connect an external feedback loop, and it can be loaded with a capacitor to tune delay between CLKIN and the Y outputs.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-8
Category Clock/Timing
Pins 8

CAD (KiCad official)

  • Symbol: CDCVF2505PWR
  • Footprint: Package_SO:TSSOP-8_3x3mm_P0.65mm
  • 3D model: TSSOP-8 (KiCad packages3D, STEP)
  • 3D model files: cdcvf2505pwr-etched.step / cdcvf2505pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cdcvf2505pwr.step / cdcvf2505pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (25 pp, sha256 cb7590012710844f, retrieved 2026-10-03, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF