CDCE937QPWRQ1

{
  "slug": "cdce937qpwrq1",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Clock Generators, PLLs, Frequency Synthesizers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "clock-timing",
    "cdce937qpwrq1",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cdce937qpwrq1.kicad_sym",
    "cdce937qpwrq1.kicad_mod",
    "cdce937qpwrq1.glb",
    "cdce937qpwrq1.step",
    "cdce937qpwrq1.lbr",
    "docs/hero.png",
    "docs/cdce937qpwrq1-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "cdce937qpwrq1-hero.glb",
    "cdce937qpwrq1-hero.overlay.json"
  ],
  "component": {
    "mpn": "CDCE937QPWRQ1",
    "manufacturer": "Texas Instruments",
    "package": "TSSOP-20",
    "pin_count": 20,
    "category": "Clock/Timing",
    "subcategory": "Clock Generators, PLLs, Frequency Synthesizers",
    "datasheet": "https://www.ti.com/cn/lit/gpn/cdce937-q1",
    "parts": {
      "symbol": "cdce937qpwrq1.kicad_sym",
      "footprint": "cdce937qpwrq1.kicad_mod",
      "model_3d": "cdce937qpwrq1-hero.glb",
      "model_3d_plain": "cdce937qpwrq1.glb",
      "model_3d_step": "cdce937qpwrq1-etched.step",
      "model_3d_step_plain": "cdce937qpwrq1.step",
      "lbr": "cdce937qpwrq1.lbr"
    },
    "distributor_links": {
      "lcsc": "C1535646",
      "digikey": "296-25641-2-ND",
      "mouser": "595-CDCE937QPWRQ1"
    },
    "distributor_check": {
      "checked_at": "2026-10-08T22:04:52Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-25641-2-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-CDCE937QPWRQ1",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "Xin/CLK",
        "type": "input",
        "description": "Crystal oscillator input or LVCMOS clock input (selected via the SDA/SCL bus), with crystal fundamental frequency 8 MHz to 32 MHz and clock input range 0 to 1.9 V."
      },
      {
        "number": "2",
        "name": "S0",
        "type": "input",
        "description": "User-programmable LVCMOS control input with an internal 500 kΩ pull-up resistor, with input voltage range 0 to 1.9 V; it is the only control pin that is never multiplexed with the serial interface."
      },
      {
        "number": "3",
        "name": "VDD",
        "type": "power_in",
        "description": "1.8 V device supply, with recommended range 1.7 V to 1.9 V."
      },
      {
        "number": "4",
        "name": "VCtrl",
        "type": "input",
        "description": "VCXO control voltage input, to be left open or pulled up to about 500 kΩ when unused, with control voltage range 0 to VDD."
      },
      {
        "number": "5",
        "name": "GND",
        "type": "power_in",
        "description": "Ground."
      },
      {
        "number": "6",
        "name": "Vddout",
        "type": "power_in",
        "description": "Output supply for all Y outputs: 3.3 V or 2.5 V for CDCE937-Q1 (recommended range 2.3 V to 3.6 V), 1.8 V for CDCEL937-Q1 (1.7 V to 1.9 V)."
      },
      {
        "number": "7",
        "name": "Y4",
        "type": "output",
        "description": "LVCMOS clock output, with output current limited to IOH/IOL of ±12 mA at 3.3 V, ±10 mA at 2.5 V, or ±8 mA at 1.8 V."
      },
      {
        "number": "8",
        "name": "Y5",
        "type": "output",
        "description": "LVCMOS clock output, with output current limited to IOH/IOL of ±12 mA at 3.3 V, ±10 mA at 2.5 V, or ±8 mA at 1.8 V."
      },
      {
        "number": "9",
        "name": "GND",
        "type": "power_in",
        "description": "Ground."
      },
      {
        "number": "10",
        "name": "Vddout",
        "type": "power_in",
        "description": "Output supply for all Y outputs: 3.3 V or 2.5 V for CDCE937-Q1 (recommended range 2.3 V to 3.6 V), 1.8 V for CDCEL937-Q1 (1.7 V to 1.9 V)."
      },
      {
        "number": "11",
        "name": "Y7",
        "type": "output",
        "description": "LVCMOS clock output, with output current limited to IOH/IOL of ±12 mA at 3.3 V, ±10 mA at 2.5 V, or ±8 mA at 1.8 V."
      },
      {
        "number": "12",
        "name": "Y6",
        "type": "output",
        "description": "LVCMOS clock output, with output current limited to IOH/IOL of ±12 mA at 3.3 V, ±10 mA at 2.5 V, or ±8 mA at 1.8 V."
      },
      {
        "number": "13",
        "name": "Vddout",
        "type": "power_in",
        "description": "Output supply for all Y outputs: 3.3 V or 2.5 V for CDCE937-Q1 (recommended range 2.3 V to 3.6 V), 1.8 V for CDCEL937-Q1 (1.7 V to 1.9 V)."
      },
      {
        "number": "14",
        "name": "Y3",
        "type": "output",
        "description": "LVCMOS clock output, with output current limited to IOH/IOL of ±12 mA at 3.3 V, ±10 mA at 2.5 V, or ±8 mA at 1.8 V."
      },
      {
        "number": "15",
        "name": "Y2",
        "type": "output",
        "description": "LVCMOS clock output, with output current limited to IOH/IOL of ±12 mA at 3.3 V, ±10 mA at 2.5 V, or ±8 mA at 1.8 V."
      },
      {
        "number": "16",
        "name": "GND",
        "type": "power_in",
        "description": "Ground."
      },
      {
        "number": "17",
        "name": "Y1",
        "type": "output",
        "description": "LVCMOS clock output, with output current limited to IOH/IOL of ±12 mA at 3.3 V, ±10 mA at 2.5 V, or ±8 mA at 1.8 V."
      },
      {
        "number": "18",
        "name": "SCL/S2",
        "type": "input",
        "description": "Serial clock input for the SDA/SCL bus (default function, 500 kΩ internal pull-up), or user-programmable LVCMOS control input S2 when SPICON is set in EEPROM; SDA/SCL inputs are rated up to 3.6 V."
      },
      {
        "number": "19",
        "name": "SDA/S1",
        "type": "bidirectional",
        "description": "Bidirectional serial data line for the SDA/SCL bus (default function, 500 kΩ internal pull-up), or user-programmable LVCMOS control input S1 when SPICON is set in EEPROM; SDA is rated up to 3.6 V."
      },
      {
        "number": "20",
        "name": "Xout",
        "type": "output",
        "description": "Crystal oscillator output, to be left open or pulled up to about 500 kΩ when unused."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Vddout is printed as 3.3 V/2.5 V for CDCE937-Q1 and 1.8 V for CDCEL937-Q1. The MPN CDCE937QPWRQ1 is ; These pins are multiplexed. Default function is the I2C-style SDA/SCL bus; they become S1/S2 control; Xin/CLK is a crystal input or an LVCMOS clock input, selected via the INCLK setting on the bus. Type"
        ],
        "pages_sent": 30,
        "cost_usd": 0.171,
        "at": "2026-10-08T22:04:26"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/cdce937-q1",
        "pages": 41,
        "sha256": "f211c5dd15df35c8",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 20,
        "described": 20,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "cdce937qpwrq1.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          6.5,
          1.2
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "97339947f3a7196470ec2f1d9f9b92bb2fc2ab66ad53be0cf105192585ef3c9a",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cdce937qpwrq1-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          6.5,
          1.2
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "9c8e5d98d453915bb53a04531d3cf857a95d9fccd8e73ec29b2c07bc0203b3d7",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}