component
CDCE72010RGCT
Public Made by Adomby adom
Texas Instruments Clock Generators, PLLs, Frequency Synthesizers, VQFN-64-EP(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568
{
"schema_version": 1,
"type": "component",
"slug": "cdce72010rgct",
"title": "CDCE72010RGCT",
"brief": "Texas Instruments Clock Generators, PLLs, Frequency Synthesizers, VQFN-64-EP(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"clock-timing",
"cdce72010rgct",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "CDCE72010RGCT",
"manufacturer": "Texas Instruments",
"package": "VQFN-64-EP(9x9)",
"pin_count": 65,
"category": "Clock/Timing",
"subcategory": "Clock Generators, PLLs, Frequency Synthesizers",
"datasheet": "https://www.ti.com/cn/lit/gpn/cdce72010",
"parts": {
"symbol": "cdce72010rgct.kicad_sym",
"footprint": "cdce72010rgct.kicad_mod",
"model_3d": "cdce72010rgct-hero.glb",
"model_3d_plain": "cdce72010rgct.glb",
"model_3d_step": "cdce72010rgct-etched.step",
"model_3d_step_plain": "cdce72010rgct.step",
"lbr": "cdce72010rgct.lbr"
},
"distributor_links": {
"lcsc": "C882829",
"digikey": "296-23522-2-ND",
"mouser": "595-CDCE72010RGCT"
},
"distributor_check": {
"checked_at": "2026-10-10T12:47:31Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "296-23522-2-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "595-CDCE72010RGCT",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "TESTOUTA",
"type": "passive",
"description": "Analog test point for TI internal testing; connect a 1kΩ pull-down resistor or leave unconnected."
},
{
"number": "2",
"name": "GND_CP",
"type": "power_in",
"description": "Analog ground for the charge pump."
},
{
"number": "3",
"name": "CP_OUT",
"type": "output",
"description": "Charge pump output."
},
{
"number": "4",
"name": "VCC_PLL",
"type": "power_in",
"description": "3.3V PLL supply voltage for the PLL circuitry; internally connected to pin 63."
},
{
"number": "5",
"name": "VCC",
"type": "power_in",
"description": "3.3V supply for the output buffers; internally connected to pin 8."
},
{
"number": "6",
"name": "U0N",
"type": "output",
"description": "Negative output 0, user definable as LVPECL, LVDS or LVCMOS via SPI."
},
{
"number": "7",
"name": "U0P",
"type": "output",
"description": "Positive output 0, user definable as LVPECL, LVDS or LVCMOS via SPI."
},
{
"number": "8",
"name": "VCC",
"type": "power_in",
"description": "3.3V supply for the output buffers; internally connected to pin 5."
},
{
"number": "9",
"name": "U1N",
"type": "output",
"description": "Negative output 1, user definable as LVPECL, LVDS or LVCMOS via SPI."
},
{
"number": "10",
"name": "U1P",
"type": "output",
"description": "Positive output 1, user definable as LVPECL, LVDS or LVCMOS via SPI."
},
{
"number": "11",
"name": "VCC",
"type": "power_in",
"description": "3.3V supply for the output buffers."
},
{
"number": "12",
"name": "U2N",
"type": "output",
"description": "Negative output 2, user definable as LVPECL, LVDS or LVCMOS via SPI."
},
{
"number": "13",
"name": "U2P",
"type": "output",
"description": "Positive output 2, user definable as LVPECL, LVDS or LVCMOS via SPI."
},
{
"number": "14",
"name": "VCC",
"type": "power_in",
"description": "3.3V supply for the output buffers."
},
{
"number": "15",
"name": "SPI_MISO",
"type": "tri_state",
"description": "3-state LVCMOS serial data output to the SPI bus, enabled when SPI_LE is asserted low."
},
{
"number": "16",
"name": "MODE_SEL",
"type": "input",
"description": "High or unconnected selects SPI mode; tied low selects configuration default (CD) mode, loading defaults from EEPROM at start-up."
},
{
"number": "17",
"name": "PD",
"type": "input",
"description": "Active-low power-down input (or SPI bit) with internal 150-kΩ pull-up, defaulting to logic 1 if unconnected."
},
{
"number": "18",
"name": "AUX_SEL",
"type": "input",
"description": "CD-mode only: 1 or unconnected disables output 9 and enables the auxiliary input to drive outputs 0 to 8; low enables output 9 with outputs driven by the VCXO input."
},
{
"number": "19",
"name": "VCC",
"type": "power_in",
"description": "3.3V supply for the output buffers."
},
{
"number": "20",
"name": "U3N",
"type": "output",
"description": "Negative output 3, user definable as LVPECL, LVDS or LVCMOS via SPI."
},
{
"number": "21",
"name": "U3P",
"type": "output",
"description": "Positive output 3, user definable as LVPECL, LVDS or LVCMOS via SPI."
},
{
"number": "22",
"name": "VCC",
"type": "power_in",
"description": "3.3V supply for the output buffers."
},
{
"number": "23",
"name": "U4N",
"type": "output",
"description": "Negative output 4, user definable as LVPECL, LVDS or LVCMOS via SPI."
},
{
"number": "24",
"name": "U4P",
"type": "output",
"description": "Positive output 4, user definable as LVPECL, LVDS or LVCMOS via SPI."
},
{
"number": "25",
"name": "VCC",
"type": "power_in",
"description": "3.3V supply for the output buffers."
},
{
"number": "26",
"name": "U5N",
"type": "output",
"description": "Negative output 5, user definable as LVPECL, LVDS or LVCMOS via SPI."
},
{
"number": "27",
"name": "U5P",
"type": "output",
"description": "Positive output 5, user definable as LVPECL, LVDS or LVCMOS via SPI."
},
{
"number": "28",
"name": "VCC",
"type": "power_in",
"description": "3.3V supply for the output buffers; internally connected to pin 31."
},
{
"number": "29",
"name": "U6N",
"type": "output",
"description": "Negative output 6, user definable as LVPECL, LVDS or LVCMOS via SPI."
},
{
"number": "30",
"name": "U6P",
"type": "output",
"description": "Positive output 6, user definable as LVPECL, LVDS or LVCMOS via SPI."
},
{
"number": "31",
"name": "VCC",
"type": "power_in",
"description": "3.3V supply for the output buffers; internally connected to pin 28."
},
{
"number": "32",
"name": "GND",
"type": "power_in",
"description": "Ground, connected to the thermal pad internally."
},
{
"number": "33",
"name": "RESET/HOLD",
"type": "input",
"description": "Active-low LVCMOS input programmable via SPI as RESET (default) or HOLD, with internal 150-kΩ pull-up; RESET 3-states the charge pump and resets counters, HOLD only 3-states the charge pump."
},
{
"number": "34",
"name": "VCC",
"type": "power_in",
"description": "3.3V supply for the output buffers."
},
{
"number": "35",
"name": "U7N",
"type": "output",
"description": "Negative output 7, user definable as LVPECL, LVDS or LVCMOS via SPI."
},
{
"number": "36",
"name": "U7P",
"type": "output",
"description": "Positive output 7, user definable as LVPECL, LVDS or LVCMOS via SPI."
},
{
"number": "37",
"name": "VCC",
"type": "power_in",
"description": "3.3V supply for the output buffers."
},
{
"number": "38",
"name": "U8N",
"type": "output",
"description": "Negative output 8, user definable as LVPECL, LVDS or LVCMOS via SPI."
},
{
"number": "39",
"name": "U8P",
"type": "output",
"description": "Positive output 8, user definable as LVPECL, LVDS or LVCMOS via SPI."
},
{
"number": "40",
"name": "VCC",
"type": "power_in",
"description": "3.3V supply for the output buffers; internally connected to pin 43."
},
{
"number": "41",
"name": "U9N/AUXINN",
"type": "bidirectional",
"description": "Negative universal output buffer 9 that can be 3-stated and used as negative auxiliary input buffer, requiring external termination."
},
{
"number": "42",
"name": "U9P/AUXINP",
"type": "bidirectional",
"description": "Positive universal output buffer 9 that can be 3-stated and used as positive auxiliary input buffer, requiring external termination."
},
{
"number": "43",
"name": "VCC",
"type": "power_in",
"description": "3.3V supply for the output buffers; internally connected to pin 40."
},
{
"number": "44",
"name": "SPI_MOSI/CD3",
"type": "input",
"description": "LVCMOS serial control data input for the SPI bus; becomes CD3 in configuration default mode and should be tied to GND."
},
{
"number": "45",
"name": "SPI_LE/CD1",
"type": "input",
"description": "LVCMOS control latch enable input for the SPI with hysteresis; becomes CD1 in configuration default mode."
},
{
"number": "46",
"name": "SPI_CLK/CD2",
"type": "input",
"description": "LVCMOS serial control clock input for the SPI bus with hysteresis; becomes CD2 in configuration default mode."
},
{
"number": "47",
"name": "REF_SEL",
"type": "input",
"description": "External reference select when auto select is off (1 = PRI_REF, 0 = SEC_REF), with internal 150-kΩ pull-up defaulting to logic 1."
},
{
"number": "48",
"name": "VCCA",
"type": "power_in",
"description": "3.3V supply for internal analog circuitry."
},
{
"number": "49",
"name": "VCCA",
"type": "power_in",
"description": "3.3V supply for internal analog circuitry."
},
{
"number": "50",
"name": "PLL_LOCK",
"type": "output",
"description": "LVCMOS PLL lock indicator, high when the PLL is in lock, programmable as digital or analog lock detect."
},
{
"number": "51",
"name": "VCC_VCXO",
"type": "power_in",
"description": "3.3V VCXO input buffer and circuitry supply; internally connected to pin 54."
},
{
"number": "52",
"name": "VCXO_IN-",
"type": "input",
"description": "Complementary VCXO input for LVPECL/LVDS; for an LVCMOS input on VCXO_IN+, ground this pin through a 1k resistor."
},
{
"number": "53",
"name": "VCXO_IN+",
"type": "input",
"description": "VCXO positive input for LVPECL, LVDS and LVCMOS level inputs."
},
{
"number": "54",
"name": "VCC_VCXO",
"type": "power_in",
"description": "3.3V VCXO input buffer and circuitry supply; internally connected to pin 51."
},
{
"number": "55",
"name": "STATUS",
"type": "output",
"description": "LVCMOS output for TI internal testing; leave unconnected unless configured as IREF_CP, then connect a 12-kΩ resistor to GND."
},
{
"number": "56",
"name": "VBB",
"type": "output",
"description": "Internal voltage bias analog output."
},
{
"number": "57",
"name": "VCC_IN",
"type": "power_in",
"description": "3.3V reference input buffers and circuitry supply; internally connected to pin 60."
},
{
"number": "58",
"name": "PRI_REF-",
"type": "input",
"description": "Negative primary reference clock input (LVPECL, LVDS); for LVCMOS ground this pin through a 1k resistor."
},
{
"number": "59",
"name": "PRI_REF+",
"type": "input",
"description": "Positive primary reference clock input (LVPECL, LVDS, LVCMOS)."
},
{
"number": "60",
"name": "VCC_IN",
"type": "power_in",
"description": "3.3V reference input buffers and circuitry supply; internally connected to pin 57."
},
{
"number": "61",
"name": "SEC_REF-",
"type": "input",
"description": "Negative secondary reference clock input (LVPECL, LVDS); for LVCMOS ground this pin through a 1k resistor."
},
{
"number": "62",
"name": "SEC_REF+",
"type": "input",
"description": "Positive secondary reference clock input (LVPECL, LVDS, LVCMOS)."
},
{
"number": "63",
"name": "VCC_PLL",
"type": "power_in",
"description": "3.3V PLL supply voltage for the PLL circuitry; internally connected to pin 4."
},
{
"number": "64",
"name": "VCC_CP",
"type": "power_in",
"description": "Charge pump supply, same as the external VCO/VCXO supply, settable from 2.3V to 3.6V."
},
{
"number": "65",
"name": "GND_PAD",
"type": "power_in",
"description": "Ground on the thermal pad; see layout recommendations."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The thermal pad is printed as 'GND PAD' with no pin number. It is listed as 'PAD' and is not a numbe; The 9x9 body size in the package hint does not appear in the supplied text. The text gives the packa; The thermal resistance table refers to the RGZ package, which does not match the RGC package used fo",
"exposed pad 65 added from the footprint",
"dropped thermal pad ['EP'] absent from footprint"
],
"pages_sent": 22,
"cost_usd": 0.1699,
"at": "2026-10-10T12:47:12"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/cdce72010",
"pages": 78,
"sha256": "125ed3ab5da2d5d2",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 65,
"described": 65,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "cdce72010rgct.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9,
9,
0.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "dce07a86ec3fe3ca87eebdff13827f55e036ced5518fee01f85cec4a3f56366d",
"checked": "2026-10-10",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "cdce72010rgct-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9,
9,
0.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "4f85eed0abefd7df792a106a1242a71d30e448c180019da45738a7d6711083e0",
"checked": "2026-10-10",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "VQFN-64-EP(9x9)",
"Category": "Clock/Timing",
"Pins": "65"
}
},
"variants": [],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"cdce72010rgct"
],
"discovery_pitch": "CDCE72010RGCT (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"cdce72010rgct.kicad_sym",
"cdce72010rgct.kicad_mod",
"cdce72010rgct.glb",
"cdce72010rgct.step",
"cdce72010rgct.lbr",
"docs/hero.png",
"docs/cdce72010rgct-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"cdce72010rgct-hero.glb",
"cdce72010rgct-hero.overlay.json"
],
"visibility": {
"public": true
}
}