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CD74HCT166M96

Texas Instruments · Shift Registers · SOIC-16

CD74HCT166M96 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SER input Serial data input, shifted into the first register stage on each clock rising edge when SH/LD is high.
2 A input Parallel data input A, loaded into the register when SH/LD is low.
3 B input Parallel data input B, loaded into the register when SH/LD is low.
4 C input Parallel data input C, loaded into the register when SH/LD is low.
5 D input Parallel data input D, loaded into the register when SH/LD is low.
6 CLK INH input Clock inhibit input, an active-low clock enable in the gated-OR clock structure; the CLK and CLK INH pin roles can be swapped for layout convenience.
7 CLK input Clock input, register advances on the low-to-high transition; HCT inputs are LSTTL-compatible (VIL 0.8 V max, VIH 2 V min).
8 GND power_in Ground, 0 V reference.
9 CLR input Active-low asynchronous clear that overrides all other inputs and forces all register bits low.
10 E input Parallel data input E, loaded into the register when SH/LD is low.
11 F input Parallel data input F, loaded into the register when SH/LD is low.
12 G input Parallel data input G, loaded into the register when SH/LD is low.
13 QH output Serial output from the last register stage (Q7); can drive the SER input of a succeeding stage.
14 H input Parallel data input H, loaded into the register when SH/LD is low.
15 SH/LD input Shift/load select: low loads parallel data on the clock edge, high enables serial shifting.
16 VCC power_in Supply voltage, 4.5 V to 5.5 V for HCT types (absolute max 7 V); decouple with a 0.1 µF capacitor close to the pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16
Category Logic
Pins 16

CAD (KiCad official)

  • Symbol: CD74HCT166M96
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: cd74hct166m96-etched.step / cd74hct166m96-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd74hct166m96.step / cd74hct166m96.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (24 pp, sha256 79e283a5a2780469, retrieved 2026-10-08, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF