CD74HC4017QPWRG4Q1

{
  "slug": "cd74hc4017qpwrg4q1",
  "version": "0.1.1",
  "type": "component",
  "description": "Texas Instruments Counters / Dividers, TSSOP-16. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "logic ics",
    "cd74hc4017qpwrg4q1",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
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    "path": "docs/hero.png"
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    "README.md",
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    "cd74hc4017qpwrg4q1.glb",
    "cd74hc4017qpwrg4q1.step",
    "cd74hc4017qpwrg4q1.lbr",
    "docs/hero.png",
    "docs/cd74hc4017qpwrg4q1-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "cd74hc4017qpwrg4q1-hero.glb",
    "cd74hc4017qpwrg4q1-hero.overlay.json",
    "cd74hc4017qpwrg4q1-etched.glb"
  ],
  "component": {
    "mpn": "CD74HC4017QPWRG4Q1",
    "manufacturer": "Texas Instruments",
    "package": "TSSOP-16",
    "pin_count": 16,
    "category": "Logic ICs",
    "subcategory": "Counters / Dividers",
    "datasheet": "https://www.ti.com/lit/ds/symlink/cd74hc4017qpwrg4q1.pdf",
    "parts": {
      "symbol": "cd74hc4017qpwrg4q1.kicad_sym",
      "footprint": "cd74hc4017qpwrg4q1.kicad_mod",
      "model_3d": "cd74hc4017qpwrg4q1-hero.glb",
      "model_3d_plain": "cd74hc4017qpwrg4q1-etched.glb",
      "model_3d_step": "cd74hc4017qpwrg4q1-etched.step",
      "model_3d_step_plain": "cd74hc4017qpwrg4q1.step",
      "lbr": "cd74hc4017qpwrg4q1.lbr"
    },
    "distributor_links": {
      "lcsc": "C2675441",
      "digikey": "296-31586-2-ND",
      "mouser": "595-74HC4017QPWRG4Q1"
    },
    "distributor_check": {
      "checked_at": "2026-11-05T23:48:20Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-31586-2-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "595-74HC4017QPWRG4Q1",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "Q5",
        "type": "output",
        "description": "Decoded output 5 is normally low, goes high during clock period 5 of the ten-clock-period cycle, and is forced low by a high MR."
      },
      {
        "number": "2",
        "name": "Q1",
        "type": "output",
        "description": "Decoded output 1 is normally low, goes high during clock period 1 of the ten-clock-period cycle, and is forced low by a high MR."
      },
      {
        "number": "3",
        "name": "Q0",
        "type": "output",
        "description": "Decoded output 0 goes high during clock period 0 of the ten-clock-period cycle and is the only decoded output that MR sets high."
      },
      {
        "number": "4",
        "name": "Q2",
        "type": "output",
        "description": "Decoded output 2 is normally low, goes high during clock period 2 of the ten-clock-period cycle, and is forced low by a high MR."
      },
      {
        "number": "5",
        "name": "Q6",
        "type": "output",
        "description": "Decoded output 6 is normally low, goes high during clock period 6 of the ten-clock-period cycle, and is forced low by a high MR."
      },
      {
        "number": "6",
        "name": "Q7",
        "type": "output",
        "description": "Decoded output 7 is normally low, goes high during clock period 7 of the ten-clock-period cycle, and is forced low by a high MR."
      },
      {
        "number": "7",
        "name": "Q3",
        "type": "output",
        "description": "Decoded output 3 is normally low, goes high during clock period 3 of the ten-clock-period cycle, and is forced low by a high MR."
      },
      {
        "number": "8",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference; all voltages are referenced to GND."
      },
      {
        "number": "9",
        "name": "Q8",
        "type": "output",
        "description": "Decoded output 8 is normally low, goes high during clock period 8 of the ten-clock-period cycle, and is forced low by a high MR."
      },
      {
        "number": "10",
        "name": "Q4",
        "type": "output",
        "description": "Decoded output 4 is normally low, goes high during clock period 4 of the ten-clock-period cycle, and is forced low by a high MR."
      },
      {
        "number": "11",
        "name": "Q9",
        "type": "output",
        "description": "Decoded output 9 is normally low, goes high during clock period 9 of the ten-clock-period cycle, and is forced low by a high MR."
      },
      {
        "number": "12",
        "name": "TC",
        "type": "output",
        "description": "Carry output goes low to high after output 9 goes high to low, is high when the count n is less than 5 and low otherwise, and is used with CE to cascade stages."
      },
      {
        "number": "13",
        "name": "CE",
        "type": "input",
        "description": "Clock enable; a high level disables counting."
      },
      {
        "number": "14",
        "name": "CP",
        "type": "input",
        "description": "Clock input; the counter increments on the low-to-high transition when CE and MR are low (positive-edge clocking)."
      },
      {
        "number": "15",
        "name": "MR",
        "type": "input",
        "description": "Master reset; when taken high it sets output 0 high and all other decoded outputs low."
      },
      {
        "number": "16",
        "name": "VCC",
        "type": "power_in",
        "description": "Supply voltage, 2 V to 6 V per the recommended operating conditions."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/cd74hc4017qpwrg4q1.pdf",
        "pages": 15,
        "sha256": "dfb7c4361299bb41",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
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      "footprint": "viewers/footprint.html"
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    "models_3d": [
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        "file": "cd74hc4017qpwrg4q1.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "6ad5e98224d02a427d9a6b929a28dbc158b9925fba5adec12db05079f1016948",
        "checked": "2026-11-05",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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    ],
    "package_dims": {
      "package_code": "PW0016A (TSSOP-16, PW)",
      "source_page": 12,
      "D": {
        "nom_mm": 5.0,
        "range_mm": [
          4.9,
          5.1
        ]
      },
      "E1": {
        "nom_mm": 4.4,
        "range_mm": [
          4.3,
          4.5
        ]
      },
      "E": {
        "nom_mm": 6.4,
        "range_mm": [
          6.2,
          6.6
        ]
      },
      "e": {
        "nom_mm": 0.65,
        "range_mm": [
          null,
          null
        ]
      },
      "A": {
        "nom_mm": 1.2,
        "range_mm": [
          null,
          1.2
        ]
      },
      "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
      "model_check": {
        "file": "cd74hc4017qpwrg4q1.step",
        "verdict": "PASS",
        "reasons": [
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        ],
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      }
    }
  }
}