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CD74HC20M

Texas Instruments · Logic Gates · SOIC-14

CD74HC20M from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Channel 1 input A of the first 4-input NAND gate, which performs Y = A·B·C·D in positive logic; standard CMOS input with the input voltage range 0 to VCC.
2 1B input Channel 1 input B of the first 4-input NAND gate; unused inputs must be tied to VCC or GND and must not be left floating.
3 NC unconnected Not internally connected.
4 1C input Channel 1 input C of the first 4-input NAND gate; unused inputs must be tied to VCC or GND and must not be left floating.
5 1D input Channel 1 input D of the first 4-input NAND gate; unused inputs must be tied to VCC or GND and must not be left floating.
6 1Y output Channel 1 NAND output Y (Y = A·B·C·D) from a balanced CMOS push-pull output; output current is limited to ±25 mA continuous per the absolute maximum ratings.
7 GND power_in Ground reference for the device; continuous current through VCC or GND must not exceed ±50 mA.
8 2Y output Channel 2 NAND output Y (Y = A·B·C·D) from a balanced CMOS push-pull output; output current is limited to ±25 mA continuous per the absolute maximum ratings.
9 2A input Channel 2 input A of the second 4-input NAND gate; standard CMOS input with the input voltage range 0 to VCC.
10 2B input Channel 2 input B of the second 4-input NAND gate; unused inputs must be tied to VCC or GND and must not be left floating.
11 NC unconnected Not internally connected.
12 2C input Channel 2 input C of the second 4-input NAND gate; unused inputs must be tied to VCC or GND and must not be left floating.
13 2D input Channel 2 input D of the second 4-input NAND gate; unused inputs must be tied to VCC or GND and must not be left floating.
14 VCC power_in Positive supply; recommended operating range is 2 V to 6 V, with an absolute maximum of 7 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: CD74HC20M
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: cd74hc20m-etched.step / cd74hc20m-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd74hc20m.step / cd74hc20m.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (27 pp, sha256 3c399a095d2d45af, retrieved 2026-10-08, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF