component
CD4520BE
Public Made by Adomby adom
lingxingic Counters, Dividers, DIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
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"title": "CD4520BE",
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"package": "DIP-16",
"pin_count": 16,
"category": "Logic",
"subcategory": "Counters, Dividers",
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"parts": {
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"footprint": "cd4520be.kicad_mod",
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"lbr": "cd4520be.lbr"
},
"distributor_links": {
"lcsc": "C24833636",
"digikey": "296-2077-ND",
"mouser": "595-CD4520BE"
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"checked_at": "2026-10-16T14:57:01Z",
"source": "Component Ocean /api/assign-pns",
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"pn": "296-2077-ND",
"status": "found"
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{
"number": "1",
"name": "CP0_1",
"type": "input",
"description": "Clock input of counter 1 that advances the count on a LOW-to-HIGH transition (per the function table, with CP1 LOW and MR LOW)."
},
{
"number": "2",
"name": "CP1_1",
"type": "input",
"description": "Clock input of counter 1 that advances the count on a HIGH-to-LOW transition (per the function table, with CP0 LOW and MR LOW)."
},
{
"number": "3",
"name": "Q0_1",
"type": "output",
"description": "Output Q0 of counter 1 (bit 0); forced LOW while MR is HIGH."
},
{
"number": "4",
"name": "Q1_1",
"type": "output",
"description": "Output Q1 of counter 1 (bit 1); forced LOW while MR is HIGH."
},
{
"number": "5",
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{
"number": "6",
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"description": "Output Q3 of counter 1 (bit 3); forced LOW while MR is HIGH."
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{
"number": "7",
"name": "MR_1",
"type": "input",
"description": "Master reset input for counter 1; a HIGH level sets nQ0 to nQ3 LOW."
},
{
"number": "8",
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"type": "power_in",
"description": "Ground supply voltage; all voltages in the datasheet are referenced to VSS (0 V)."
},
{
"number": "9",
"name": "CP0_2",
"type": "input",
"description": "Clock input of counter 2 that advances the count on a LOW-to-HIGH transition (per the function table, with CP1 LOW and MR LOW)."
},
{
"number": "10",
"name": "CP1_2",
"type": "input",
"description": "Clock input of counter 2 that advances the count on a HIGH-to-LOW transition (per the function table, with CP0 LOW and MR LOW)."
},
{
"number": "11",
"name": "Q0_2",
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"description": "Output Q0 of counter 2 (bit 0); forced LOW while MR is HIGH."
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{
"number": "12",
"name": "Q1_2",
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"description": "Output Q1 of counter 2 (bit 1); forced LOW while MR is HIGH."
},
{
"number": "13",
"name": "Q2_2",
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"description": "Output Q2 of counter 2 (bit 2); forced LOW while MR is HIGH."
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{
"number": "14",
"name": "Q3_2",
"type": "output",
"description": "Output Q3 of counter 2 (bit 3); forced LOW while MR is HIGH."
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{
"number": "15",
"name": "MR_2",
"type": "input",
"description": "Master reset input for counter 2; a HIGH level sets nQ0 to nQ3 LOW."
},
{
"number": "16",
"name": "VDD",
"type": "power_in",
"description": "Supply voltage; recommended operating range is 3 V to 15 V, with an absolute maximum of 18 V."
}
],
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"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The Pin Configurations diagram text on page 4 is garbled; the pin numbers and names were taken from ; The DIP16 variant is mapped to MPN CD4520BE from the ordering table on page 3, where the CD4520BE ma; Pin descriptions state only functions from the datasheet; the datasheet gives no per-pin electrical "
],
"pages_sent": 15,
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"at": "2026-10-16T14:56:44"
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"Package": "DIP-16",
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{
"name": "HIGH-level output current (5V, VO=2.5V)",
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"name": "HIGH-level output current (10V)",
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"source": "datasheet"
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"name": "supply voltage (absolute maximum)",
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"name": "input voltage (absolute maximum)",
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{
"name": "DC input current (absolute maximum)",
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{
"name": "storage temperature (absolute maximum)",
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{
"name": "soldering temperature (absolute maximum)",
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"name": "supply voltage (recommended operating)",
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{
"name": "propagation delay HIGH to LOW, nCP0/nCP1 to nQn (5V)",
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{
"name": "propagation delay HIGH to LOW, nCP0/nCP1 to nQn (10V)",
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"name": "propagation delay HIGH to LOW, nCP0/nCP1 to nQn (15V)",
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{
"name": "propagation delay HIGH to LOW, nMR to nQn (5V)",
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"name": "propagation delay HIGH to LOW, nMR to nQn (10V)",
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"name": "propagation delay LOW to HIGH, nCP0/nCP1 to nQn (10V)",
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