component
CD4510B BCD Up/Down Counter
Public Made by Adomby adom
Presettable BCD up/down counter in the 4000B CMOS family, 3 V to 18 V.
main
Ray
cd4510: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
30310f6
26d ago
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281
{
"schema_version": 1,
"type": "component",
"slug": "cd4510",
"title": "CD4510B BCD Up/Down Counter",
"brief": "Presettable BCD up/down counter in the 4000B CMOS family, 3 V to 18 V.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"logic",
"counter",
"bcd",
"up-down",
"4000-series",
"ti",
"soic-16"
],
"component": {
"mpn": "CD4510B",
"manufacturer": "Texas Instruments",
"package": "SOIC-16",
"pin_count": 16,
"category": "Logic",
"subcategory": "Counter",
"datasheet": "https://www.ti.com/lit/ds/symlink/cd4510b.pdf",
"parts": {
"symbol": "cd4510.kicad_sym",
"footprint": "cd4510.kicad_mod",
"model_3d": "cd4510-etched.glb",
"model_3d_plain": "cd4510.glb",
"model_3d_step": "cd4510-etched.step",
"model_3d_step_plain": "cd4510.step",
"lbr": "cd4510.lbr"
},
"distributor_links": {},
"pins": [
{
"number": "1",
"name": "PRESET_ENABLE",
"type": "input",
"description": "Preset (parallel-load) enable. When held high, the counter is asynchronously loaded with the BCD value on P1-P4; must be low for normal counting."
},
{
"number": "2",
"name": "Q4",
"type": "output",
"description": "Counter output bit 4 (MSB of the BCD count)."
},
{
"number": "3",
"name": "P4",
"type": "input",
"description": "Jam / parallel-load data input, bit 4 (MSB of the BCD preset word). Sampled into the fourth flip-flop while PRESET ENABLE is high."
},
{
"number": "4",
"name": "P1",
"type": "input",
"description": "Jam / parallel-load data input, bit 1 (LSB of the BCD preset word). Sampled into the first flip-flop while PRESET ENABLE is high."
},
{
"number": "5",
"name": "~{CARRY_IN}",
"type": "input",
"description": "Active-low carry-in from a less-significant stage. When held low the counter advances on each positive clock edge; when high the counter is inhibited. Tie to VSS when this stage is used stand-alone."
},
{
"number": "6",
"name": "Q1",
"type": "output",
"description": "Counter output bit 1 (LSB of the BCD count)."
},
{
"number": "7",
"name": "~{CARRY_OUT}",
"type": "output",
"description": "Active-low ripple/synchronous carry-out. Goes low on the terminal count so the next stage's CARRY IN can enable it, allowing synchronous or ripple cascading of multiple CD4510B counters."
},
{
"number": "8",
"name": "VSS",
"type": "power_in",
"description": "Ground / negative supply reference (0 V). All input and supply voltages are referenced to this pin."
},
{
"number": "9",
"name": "RESET",
"type": "input",
"description": "Active-high asynchronous master reset. Forces all Q outputs to logic 0 while held high; must be low for normal counting or preset operation."
},
{
"number": "10",
"name": "UP/DOWN",
"type": "input",
"description": "Count-direction control. High selects up-count (0-9 with a maximum of two clock pulses of non-BCD states after preset), low selects down-count. May be changed at any count in ripple-clock mode provided the first-stage clock is high."
},
{
"number": "11",
"name": "Q2",
"type": "output",
"description": "Counter output bit 2."
},
{
"number": "12",
"name": "P2",
"type": "input",
"description": "Jam / parallel-load data input, bit 2. Sampled into the second flip-flop while PRESET ENABLE is high."
},
{
"number": "13",
"name": "P3",
"type": "input",
"description": "Jam / parallel-load data input, bit 3. Sampled into the third flip-flop while PRESET ENABLE is high."
},
{
"number": "14",
"name": "Q3",
"type": "output",
"description": "Counter output bit 3."
},
{
"number": "15",
"name": "CLOCK",
"type": "input",
"description": "Positive-edge triggered clock input. Typical maximum clock frequency 2 MHz at 5 V, 4 MHz at 10 V, 5.5 MHz at 15 V (8 MHz typical at 10 V). Rise/fall time should be <=15 us at 5 V, <=5 us at 10-15 V."
},
{
"number": "16",
"name": "VDD",
"type": "power_in",
"description": "Positive supply voltage, 3 V to 18 V (parametric ratings at 5 V, 10 V, 15 V). Bypass to VSS with a ceramic capacitor."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://www.ti.com/lit/ds/symlink/cd4510b.pdf",
"pages": 20,
"sha256": "41f1a4f20347ef51",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 16,
"described": 16,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"logic": {
"family_id": "CD4510",
"logic_family": "CD4000",
"function_code": "4510",
"function_class": null,
"function_name": null,
"manufacturer": "Texas Instruments",
"is_specialty": false
},
"models_3d": [
{
"file": "cd4510.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
9.9,
1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "cd4510-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
9.9,
1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "7922740aa4b92aab51c6bc5eb7be407e28b33c5c812db24741050a400b1e4f6d",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Type": "Presettable BCD up/down counter",
"Logic family": "4000B (CMOS)",
"Count": "BCD (0-9), up or down",
"Features": "Parallel preset, carry in/out, cascadable",
"Supply voltage": "3 V to 18 V",
"Operating temperature": "-55 C to 125 C"
}
},
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"BCD counter",
"up down counter",
"presettable counter",
"decade counter"
],
"discovery_pitch": "A presettable BCD counter that counts up or down and cascades for multi-digit counting.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"cd4510.kicad_sym",
"cd4510.kicad_mod",
"cd4510.glb",
"cd4510.step",
"cd4510.lbr",
"docs/hero.png",
"docs/cd4510-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"cd4510-etched.step"
],
"variants": [
{
"mpn": "CD4510BE",
"kind": "unknown"
},
{
"mpn": "CD4510BBE",
"kind": "unknown"
},
{
"mpn": "CD4510BNSR",
"kind": "unknown"
},
{
"mpn": "CD4510BBNSR",
"kind": "unknown"
},
{
"mpn": "CD4510BPWR",
"kind": "unknown"
},
{
"mpn": "CD4510BBPWR",
"kind": "unknown"
},
{
"mpn": "CD4510BF3A",
"kind": "unknown"
}
]
}