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CD4082BE

Texas Instruments · Logic Gates · DIP-14

CD4082BE from Texas Instruments, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 J output Gate 1 output, J = A·B·C·D (4-input AND).
2 D input Gate 1 input D.
3 C input Gate 1 input C.
4 B input Gate 1 input B.
5 A input Gate 1 input A.
6 NC unconnected No connection.
7 VSS power_in Negative supply / ground (VSS).
8 NC unconnected No connection.
9 E input Gate 2 input E.
10 F input Gate 2 input F.
11 G input Gate 2 input G.
12 H input Gate 2 input H.
13 K output Gate 2 output, K = E·F·G·H (4-input AND).
14 VDD power_in Positive supply voltage (VDD).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package DIP-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: CD4082BE
  • Footprint: Package_DIP:DIP-14_W7.62mm
  • 3D model: DIP-14 (KiCad packages3D, STEP)
  • 3D model files: cd4082be-etched.step / cd4082be-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4082be.step / cd4082be.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (34 pp, sha256 68c6167d1ae45286, retrieved 2026-10-03, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF