component
CD4078BM96
Public Made by Adomby adom
Texas Instruments Logic Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CD4078BM96
Texas Instruments · Logic Gates · SOIC-14
CD4078BM96 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | K | output | OR-gate output, K = A+B+C+D+E+F+G+H (non-inverted OR of all eight inputs). |
| 2 | A | input | Input A to the 8-input NOR/OR gate; protected by internal CMOS protection network. |
| 3 | B | input | Input B to the 8-input NOR/OR gate; protected by internal CMOS protection network. |
| 4 | C | input | Input C to the 8-input NOR/OR gate; protected by internal CMOS protection network. |
| 5 | D | input | Input D to the 8-input NOR/OR gate; protected by internal CMOS protection network. |
| 6 | NC | unconnected | No internal connection; per the datasheet note, unused pins of this type may be tied to either VDD or VSS. |
| 7 | VSS | power_in | Negative supply (ground) pin for the device. |
| 8 | NC | unconnected | No internal connection; per the datasheet note, unused pins of this type may be tied to either VDD or VSS. |
| 9 | E | input | Input E to the 8-input NOR/OR gate; protected by internal CMOS protection network. |
| 10 | F | input | Input F to the 8-input NOR/OR gate; protected by internal CMOS protection network. |
| 11 | G | input | Input G to the 8-input NOR/OR gate; protected by internal CMOS protection network. |
| 12 | H | input | Input H to the 8-input NOR/OR gate; protected by internal CMOS protection network. |
| 13 | J | output | NOR-gate output, J = NOR(A,B,C,D,E,F,G,H), the inverted (NOR) combination of all eight inputs. |
| 14 | VDD | power_in | Positive supply voltage pin for the device. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
CD4078BM96 - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
cd4078bm96-etched.step/cd4078bm96-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4078bm96.step/cd4078bm96.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (20 pp, sha256
d1d07c50981c9d3a, retrieved 2026-09-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-sonnet-5(text+vision), consensusclaude-opus-4-8(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CD4078BM96
**Texas Instruments** · Logic Gates · SOIC-14
CD4078BM96 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | K | output | OR-gate output, K = A+B+C+D+E+F+G+H (non-inverted OR of all eight inputs). |
| 2 | A | input | Input A to the 8-input NOR/OR gate; protected by internal CMOS protection network. |
| 3 | B | input | Input B to the 8-input NOR/OR gate; protected by internal CMOS protection network. |
| 4 | C | input | Input C to the 8-input NOR/OR gate; protected by internal CMOS protection network. |
| 5 | D | input | Input D to the 8-input NOR/OR gate; protected by internal CMOS protection network. |
| 6 | NC | unconnected | No internal connection; per the datasheet note, unused pins of this type may be tied to either VDD or VSS. |
| 7 | VSS | power_in | Negative supply (ground) pin for the device. |
| 8 | NC | unconnected | No internal connection; per the datasheet note, unused pins of this type may be tied to either VDD or VSS. |
| 9 | E | input | Input E to the 8-input NOR/OR gate; protected by internal CMOS protection network. |
| 10 | F | input | Input F to the 8-input NOR/OR gate; protected by internal CMOS protection network. |
| 11 | G | input | Input G to the 8-input NOR/OR gate; protected by internal CMOS protection network. |
| 12 | H | input | Input H to the 8-input NOR/OR gate; protected by internal CMOS protection network. |
| 13 | J | output | NOR-gate output, J = NOR(A,B,C,D,E,F,G,H), the inverted (NOR) combination of all eight inputs. |
| 14 | VDD | power_in | Positive supply voltage pin for the device. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
## CAD (KiCad official)
- Symbol: `CD4078BM96`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `cd4078bm96-etched.step` / `cd4078bm96-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4078bm96.step` / `cd4078bm96.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cd4078b) (20 pp, sha256 `d1d07c50981c9d3a`, retrieved 2026-09-23, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-sonnet-5` (text+vision), consensus `claude-opus-4-8` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cd4078bm96-datasheet.pdf)