CD4071BM

{
  "schema_version": 1,
  "type": "component",
  "slug": "cd4071bm",
  "title": "CD4071BM",
  "brief": "HGSEMI Gates, SOP-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "cd4071bm"
  ],
  "component": {
    "mpn": "CD4071BM",
    "manufacturer": "HGSEMI",
    "package": "SOP-14",
    "pin_count": 14,
    "category": "Logic",
    "subcategory": "Gates",
    "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2206211415_HGSEMI-CD4071BM-TR_C910854.pdf",
    "parts": {
      "symbol": "cd4071bm.kicad_sym",
      "footprint": "cd4071bm.kicad_mod",
      "model_3d": "cd4071bm-etched.glb",
      "model_3d_plain": "cd4071bm.glb",
      "model_3d_step": "cd4071bm-etched.step",
      "model_3d_step_plain": "cd4071bm.step",
      "lbr": "cd4071bm.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "1A",
        "type": "input",
        "description": "Gate 1 input A. CMOS logic input, VIH >= 3.5V @ VDD=5V, VIL <= 1.5V @ VDD=5V. Input leakage <= 1uA at VDD=15V. Unused inputs must be tied to VDD or VSS."
      },
      {
        "number": "2",
        "name": "1B",
        "type": "input",
        "description": "Gate 1 input B. CMOS logic input, VIH >= 3.5V @ VDD=5V, VIL <= 1.5V @ VDD=5V. Unused inputs must be tied to VDD or VSS."
      },
      {
        "number": "3",
        "name": "1Y",
        "type": "output",
        "description": "Gate 1 output = 1A OR 1B. Buffered CMOS output. VOH ~ VDD, VOL ~ 0V. IOL >= 0.51 mA @ VDD=5V, VO=0.4V; IOH >= -0.51 mA @ VDD=5V, VO=4.6V."
      },
      {
        "number": "4",
        "name": "2Y",
        "type": "output",
        "description": "Gate 2 output = 2A OR 2B. Buffered CMOS output."
      },
      {
        "number": "5",
        "name": "2A",
        "type": "input",
        "description": "Gate 2 input A. CMOS logic input. Unused inputs must be tied to VDD or VSS."
      },
      {
        "number": "6",
        "name": "2B",
        "type": "input",
        "description": "Gate 2 input B. CMOS logic input. Unused inputs must be tied to VDD or VSS."
      },
      {
        "number": "7",
        "name": "VSS",
        "type": "power_in",
        "description": "Negative supply / ground reference (0 V). All input and output voltages are referenced to VSS."
      },
      {
        "number": "8",
        "name": "3A",
        "type": "input",
        "description": "Gate 3 input A. CMOS logic input. Unused inputs must be tied to VDD or VSS."
      },
      {
        "number": "9",
        "name": "3B",
        "type": "input",
        "description": "Gate 3 input B. CMOS logic input. Unused inputs must be tied to VDD or VSS."
      },
      {
        "number": "10",
        "name": "3Y",
        "type": "output",
        "description": "Gate 3 output = 3A OR 3B. Buffered CMOS output."
      },
      {
        "number": "11",
        "name": "4Y",
        "type": "output",
        "description": "Gate 4 output = 4A OR 4B. Buffered CMOS output."
      },
      {
        "number": "12",
        "name": "4A",
        "type": "input",
        "description": "Gate 4 input A. CMOS logic input. Unused inputs must be tied to VDD or VSS."
      },
      {
        "number": "13",
        "name": "4B",
        "type": "input",
        "description": "Gate 4 input B. CMOS logic input. Unused inputs must be tied to VDD or VSS."
      },
      {
        "number": "14",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply. Recommended operating range 3 V to 15 V (absolute max +18 V). Static IDD <= 5 uA @ VDD=5V, <= 15 uA @ VDD=15V."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2206211415_HGSEMI-CD4071BM-TR_C910854.pdf",
        "pages": 9,
        "sha256": "a0af40244b85b44c",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "logic": {
      "family_id": "CD4071",
      "logic_family": "CD4000",
      "function_code": "4071",
      "function_class": "Gate",
      "function_name": "Quad 2-Input OR Gate",
      "manufacturer": "Texas Instruments",
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "cd4071bm.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          8.7,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cd4071bm-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          8.7,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "2665c91c61842e36959315e217ee74d1c46ba0dbda9554f0253503d97823ea55",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "HGSEMI",
      "Package": "SOP-14",
      "Category": "Logic",
      "Pins": "14"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "cd4071bm"
  ],
  "discovery_pitch": "CD4071BM (HGSEMI) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cd4071bm.kicad_sym",
    "cd4071bm.kicad_mod",
    "cd4071bm.glb",
    "cd4071bm.step",
    "cd4071bm-etched.step",
    "cd4071bm.lbr",
    "docs/hero.png",
    "docs/cd4071bm-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "variants": [
    {
      "mpn": "CD4071BM/TR",
      "kind": "packaging"
    },
    {
      "mpn": "CD4071BMBE",
      "kind": "packaging"
    },
    {
      "mpn": "CD4071BMBN",
      "kind": "packaging"
    },
    {
      "mpn": "CD4071BMT/TR",
      "kind": "packaging"
    }
  ],
  "updated_at": "2026-09-24T18:47:18.404Z"
}