component

CD4070S

Public Made by Adom

by adom

GR Gates, SOP-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentlogiccd4070s
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Commit History

14 commits ← Back to Activity
cd4070s: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
Ray · 51e13fb ·
cd4070s: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero
Ray · 7040e47 ·
cd4070s: laser-etched CAD + chip hero (factory 2.0.0 backfill)
Ray · 37e0957 ·
Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout")
Ray · 6b423d3 ·
cd4070s: laser-etched CAD + chip hero (factory 2.0.0 backfill)
Ray · aff8561 ·
cd4070s: stamp component.logic (CD4070) from component-ocean
Ray · 61aa367 ·
cd4070s: backfill missing artifacts (variants)
Ray · 73d578b ·
cd4070s: publish the laser-etched STEP alongside the bare one
Ray · 5839f7b ·
Publish 0.2.0
Ray · 477349e ·
Set visibility: public
Ray · 9fc597d ·
cd4070s: viewers
Ray · 9361f1c ·
cd4070s: factory component page (tier=lcsc)
Ray · 165c438 ·
Publish 0.1.0
Ray · 5f2e5af ·
Initial commit: component/cd4070s
Ray · d52f295 ·