# CD4060BM

**lingxingic** · Counters, Dividers · SOP-16

CD4060BM from lingxingic, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Q11 | output | Counter output; logic level indicates stage 11 of 14-stage binary counter. |
| 2 | Q12 | output | Counter output; logic level indicates stage 12 of 14-stage binary counter. |
| 3 | Q13 | output | Counter output; logic level indicates stage 13 of 14-stage binary counter. |
| 4 | Q5 | output | Counter output; logic level indicates stage 5 of 14-stage binary counter. |
| 5 | Q4 | output | Counter output; logic level indicates stage 4 of 14-stage binary counter. |
| 6 | Q6 | output | Counter output; logic level indicates stage 6 of 14-stage binary counter. |
| 7 | Q3 | output | Counter output; logic level indicates stage 3 of 14-stage binary counter. |
| 8 | VSS | power_in | Ground reference at 0V; common ground return for all circuits. |
| 9 | CEXT | passive | External capacitor connection for RC oscillator circuit; connects timing capacitor. |
| 10 | REXT | passive | Oscillator pin for external resistor connection; sets oscillation frequency in RC mode. |
| 11 | RS | input | Clock input or oscillator pin; counter advances on negative-going transition; input pulse frequency 3.5-12 MHz depending on VDD. |
| 12 | MR | input | Master reset input; HIGH level asynchronously resets counter outputs Q3 to Q9 and Q11 to Q13 to LOW. |
| 13 | Q8 | output | Counter output; logic level indicates stage 8 of 14-stage binary counter. |
| 14 | Q7 | output | Counter output; logic level indicates stage 7 of 14-stage binary counter. |
| 15 | Q9 | output | Counter output; logic level indicates stage 9 of 14-stage binary counter. |
| 16 | VDD | power_in | Supply voltage input; operating range 3 V to 15 V referenced to VSS. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | lingxingic |
| Package | SOP-16 |
| Category | Logic |
| Pins | 16 |

## CAD (KiCad official)

- Symbol: `CD4060BM`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOP-16 (KiCad packages3D, STEP)
- 3D model files: `cd4060bm-etched.step` / `cd4060bm-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4060bm.step` / `cd4060bm.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [lingxingic datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603372372477571072) (16 pp, sha256 `912b5a56dff08e32`, retrieved 2026-09-21, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/cd4060bm-datasheet.pdf)