CD4046BPWR

{
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  "type": "component",
  "slug": "cd4046bpwr",
  "title": "CD4046BPWR",
  "brief": "Texas Instruments Clock Generators / Frequency Synthesizers / PLL, TSSOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.1",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "rtc",
    "cd4046bpwr"
  ],
  "component": {
    "mpn": "CD4046BPWR",
    "manufacturer": "Texas Instruments",
    "package": "TSSOP-16",
    "pin_count": 16,
    "category": "RTC",
    "subcategory": "Clock Generators / Frequency Synthesizers / PLL",
    "datasheet": "https://www.ti.com/lit/ds/symlink/cd4046b.pdf",
    "parts": {
      "symbol": "cd4046bpwr.kicad_sym",
      "footprint": "cd4046bpwr.kicad_mod",
      "model_3d": "cd4046bpwr-etched.glb",
      "model_3d_plain": "cd4046bpwr.glb",
      "model_3d_step": "cd4046bpwr-etched.step",
      "model_3d_step_plain": "cd4046bpwr.step",
      "lbr": "cd4046bpwr.lbr"
    },
    "distributor_links": {
      "digikey": "296-14109-2-ND",
      "lcsc": "C2651240"
    },
    "pins": [
      {
        "number": "1",
        "name": "PHASE_PULSES",
        "type": "output",
        "description": "Phase pulses output. Goes high to indicate a locked condition when using phase comparator II. Useful for driving a lock indicator."
      },
      {
        "number": "2",
        "name": "PHASE_COMP_I_OUT",
        "type": "output",
        "description": "Phase Comparator I output. Exclusive-OR network output; requires a 50% duty cycle on the signal and comparator inputs to maximize lock range."
      },
      {
        "number": "3",
        "name": "COMPARATOR_IN",
        "type": "input",
        "description": "Comparator input for both phase comparators. Full CMOS logic swing available; can be direct-coupled from CMOS logic or AC-coupled for smaller signal swings."
      },
      {
        "number": "4",
        "name": "VCO_OUT",
        "type": "output",
        "description": "VCO output. Full CMOS logic swing at VDD; can drive CMOS frequency dividers (CD4018, CD4020, CD4022, CD4024, CD4029, CD4059)."
      },
      {
        "number": "5",
        "name": "INHIBIT",
        "type": "input",
        "description": "VCO and source-follower ON/OFF control. Logic 0 enables the VCO and source follower; logic 1 turns them off to minimize standby power (ultra-low standby)."
      },
      {
        "number": "6",
        "name": "C1_A",
        "type": "passive",
        "description": "VCO timing capacitor C1 terminal A. External capacitor C1 (>=50 pF at VDD>=10V, >=100pF at 5V) connected between pins 6 and 7 sets VCO frequency with R1/R2."
      },
      {
        "number": "7",
        "name": "C1_B",
        "type": "passive",
        "description": "VCO timing capacitor C1 terminal B. External capacitor C1 connected between pins 6 and 7 sets VCO frequency with R1/R2."
      },
      {
        "number": "8",
        "name": "VSS",
        "type": "power_in",
        "description": "Negative supply / ground (0 V reference). Supply voltage range 3-18 V referenced from VDD (pin 16)."
      },
      {
        "number": "9",
        "name": "VCO_IN",
        "type": "input",
        "description": "VCO input (control voltage). High input impedance (~10^12 ohms). Typically driven from the low-pass filter output on the phase-comparator output."
      },
      {
        "number": "10",
        "name": "DEMODULATOR_OUT",
        "type": "output",
        "description": "Demodulator output (source follower). Provides the VCO input voltage buffered; when used, a load resistor Rs of 10k or more should be connected to VSS. Leave open when unused."
      },
      {
        "number": "11",
        "name": "R1",
        "type": "passive",
        "description": "VCO timing resistor R1 terminal (R1 to VSS). Sets VCO frequency range with C1; 5k <= R1 <= 1M recommended."
      },
      {
        "number": "12",
        "name": "R2",
        "type": "passive",
        "description": "VCO offset resistor R2 terminal (R2 to VSS). Optional; enables VCO frequency offset when present, R2 = infinity for no offset. 5k <= R2 <= 1M recommended."
      },
      {
        "number": "13",
        "name": "PHASE_COMP_II_OUT",
        "type": "tri_state",
        "description": "Phase Comparator II output. Edge-controlled digital memory network with three-state output; drives low-pass filter to control VCO input."
      },
      {
        "number": "14",
        "name": "SIGNAL_IN",
        "type": "input",
        "description": "Signal input to both phase comparators. Direct-coupled provides full CMOS logic swing (logic 0 < 30% VDD-VSS, logic 1 > 70% VDD-VSS); can be self-biased AC-coupled for smaller signals."
      },
      {
        "number": "15",
        "name": "ZENER",
        "type": "passive",
        "description": "Zener diode cathode for supply regulation. 5.2 V (typ) zener (Vz = 4.45 to 6.15 V at Iz = 50 uA); dynamic resistance ~40 ohm at Iz = 1 mA. Leave open when unused."
      },
      {
        "number": "16",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply. Operating range 3-18 V (VCO fixed oscillator), 5-18 V (phase-locked-loop operation). Absolute maximum -0.5 V to +20 V referenced to VSS."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/cd4046b.pdf",
        "pages": 20,
        "sha256": "5b8f7c0b007da6cf",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
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      "footprint": "viewers/footprint.html"
    },
    "pin1": {
      "pad": "1",
      "at": [
        -2.8625,
        -2.275
      ],
      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "TSSOP-16_4.4x5mm_P0.65mm@sha256:fbac79fc5f310754",
      "mark": "drawn"
    },
    "logic": {
      "family_id": "CD4046",
      "logic_family": "CD4000",
      "function_code": "4046",
      "function_class": "PLL",
      "function_name": "Phase-Locked Loop",
      "manufacturer": "Texas Instruments",
      "is_specialty": false
    },
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        "seat": "z = 0",
        "extents_mm": [
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          5,
          1.1
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        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "6ad5e98224d02a427d9a6b929a28dbc158b9925fba5adec12db05079f1016948",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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        "role": "eda",
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        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
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        "extents_mm": [
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        "zmin_mm": 0,
        "centre_offset_mm": 0,
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        "sha256": "0cdf5050419ff302d0b34afe43901431de716b0368cf2bac766a5717e0dfbcdb",
        "checked": "2026-11-10",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "TSSOP-16",
      "Category": "RTC",
      "Pins": "16"
    }
  },
  "sections": [
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    "readme",
    "breadcrumbs",
    "info"
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  "discovery_triggers": [
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  "discovery_pitch": "CD4046BPWR (Texas Instruments) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
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    "path": "docs/hero.png"
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    "cd4046bpwr.step",
    "cd4046bpwr-etched.step",
    "cd4046bpwr.lbr",
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    "viewers/footprint.html",
    "pads.json",
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  "visibility": {
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  },
  "variants": [
    {
      "mpn": "CD4046BPWR",
      "kind": "packaging"
    },
    {
      "mpn": "CD4046BPWRE",
      "kind": "packaging"
    },
    {
      "mpn": "CD4046BPWRF3A",
      "kind": "packaging"
    },
    {
      "mpn": "CD4046BPWRNSR",
      "kind": "packaging"
    }
  ],
  "updated_at": "2026-09-24T18:41:35.776Z",
  "description": "Texas Instruments Clock Generators / Frequency Synthesizers / PLL, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",
  "org": "adom"
}