CD4046BPWR - Commit

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Publish 0.2.1

Ray ·c6fccb0e83 ·4d ago ·parent 5d445d4

2 files changed +19−13

package.json+5−3 page.json+14−10

package.json+5−3

@@ -1,6 +1,6 @@ {   "slug": "cd4046bpwr",-  "version": "0.2.0",+  "version": "0.2.1",   "type": "component",   "description": "Texas Instruments Clock Generators / Frequency Synthesizers / PLL, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "tags": [@@ -20,11 +20,13 @@     "cd4046bpwr.kicad_mod",     "cd4046bpwr.glb",     "cd4046bpwr.step",+    "cd4046bpwr-etched.step",     "cd4046bpwr.lbr",     "docs/hero.png",     "docs/cd4046bpwr-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html",-    "pads.json"+    "pads.json",+    "cd4046bpwr-etched.glb"   ]-}\ No newline at end of file+}

page.json+14−10

@@ -4,7 +4,7 @@   "slug": "cd4046bpwr",   "title": "CD4046BPWR",   "brief": "Texas Instruments Clock Generators / Frequency Synthesizers / PLL, TSSOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",-  "version": "0.2.0",+  "version": "0.2.1",   "license": "CC-BY-SA-4.0",   "tags": [     "component",@@ -180,11 +180,11 @@         "seat": "z = 0",         "extents_mm": [           6.4,-          5.0,+          5,           1.1         ],-        "zmin_mm": -0.0,-        "centre_offset_mm": 0.0,+        "zmin_mm": 0,+        "centre_offset_mm": 0,         "footprint_binding": "identity",         "sha256": "6ad5e98224d02a427d9a6b929a28dbc158b9925fba5adec12db05079f1016948",         "checked": "2026-10-07",@@ -199,11 +199,11 @@         "seat": "z = 0",         "extents_mm": [           6.4,-          5.0,+          5,           1.1         ],-        "zmin_mm": -0.0,-        "centre_offset_mm": 0.0,+        "zmin_mm": 0,+        "centre_offset_mm": 0,         "footprint_binding": "identity",         "sha256": "0cdf5050419ff302d0b34afe43901431de716b0368cf2bac766a5717e0dfbcdb",         "checked": "2026-11-10",@@ -251,7 +251,9 @@     "docs/hero.png",     "docs/cd4046bpwr-datasheet.pdf",     "viewers/symbol.html",-    "viewers/footprint.html"+    "viewers/footprint.html",+    "pads.json",+    "cd4046bpwr-etched.glb"   ],   "visibility": {     "public": true@@ -274,5 +276,7 @@       "kind": "packaging"     }   ],-  "updated_at": "2026-09-24T18:41:35.776Z"-}+  "updated_at": "2026-09-24T18:41:35.776Z",+  "description": "Texas Instruments Clock Generators / Frequency Synthesizers / PLL, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "org": "adom"+}\ No newline at end of file