main
Ray cd4042bm: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) b4e1397
{
  "schema_version": 1,
  "type": "component",
  "slug": "cd4042bm",
  "title": "CD4042BM",
  "brief": "lingxingic Latches, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "cd4042bm",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "CD4042BM",
    "manufacturer": "lingxingic",
    "package": "SOP-16",
    "pin_count": 16,
    "category": "Logic",
    "subcategory": "Latches",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603345045894950912",
    "parts": {
      "symbol": "cd4042bm.kicad_sym",
      "footprint": "cd4042bm.kicad_mod",
      "model_3d": "cd4042bm-etched.glb",
      "model_3d_plain": "cd4042bm.glb",
      "model_3d_step": "cd4042bm-etched.step",
      "model_3d_step_plain": "cd4042bm.step",
      "lbr": "cd4042bm.lbr"
    },
    "distributor_links": {
      "lcsc": "C22390249"
    },
    "pins": [
      {
        "number": "1",
        "name": "Q4",
        "type": "output",
        "description": "Data output from latch 4."
      },
      {
        "number": "2",
        "name": "Q1",
        "type": "output",
        "description": "Data output from latch 1."
      },
      {
        "number": "3",
        "name": "Q̄1",
        "type": "output",
        "description": "Inverted data output from latch 1."
      },
      {
        "number": "4",
        "name": "D1",
        "type": "input",
        "description": "Data input to latch 1; must be connected to VDD, VSS, or another input if unused."
      },
      {
        "number": "5",
        "name": "CLOCK",
        "type": "input",
        "description": "Clock input for all four latches."
      },
      {
        "number": "6",
        "name": "POLARITY",
        "type": "input",
        "description": "Clock enable and polarity input; controls latching logic relative to CLOCK."
      },
      {
        "number": "7",
        "name": "D2",
        "type": "input",
        "description": "Data input to latch 2; must be connected to VDD, VSS, or another input if unused."
      },
      {
        "number": "8",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground (0V), voltage reference."
      },
      {
        "number": "9",
        "name": "Q̄2",
        "type": "output",
        "description": "Inverted data output from latch 2."
      },
      {
        "number": "10",
        "name": "Q2",
        "type": "output",
        "description": "Data output from latch 2."
      },
      {
        "number": "11",
        "name": "Q3",
        "type": "output",
        "description": "Data output from latch 3."
      },
      {
        "number": "12",
        "name": "Q̄3",
        "type": "output",
        "description": "Inverted data output from latch 3."
      },
      {
        "number": "13",
        "name": "D3",
        "type": "input",
        "description": "Data input to latch 3; must be connected to VDD, VSS, or another input if unused."
      },
      {
        "number": "14",
        "name": "D4",
        "type": "input",
        "description": "Data input to latch 4; must be connected to VDD, VSS, or another input if unused."
      },
      {
        "number": "15",
        "name": "Q̄4",
        "type": "output",
        "description": "Inverted data output from latch 4."
      },
      {
        "number": "16",
        "name": "VDD",
        "type": "power_in",
        "description": "Supply voltage, 3V to 15V referenced to VSS."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.2",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.2",
        "primary_model": "claude-haiku-4-5-20251001",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-4-6",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [],
        "pages_sent": 15,
        "cost_usd": 0.178,
        "at": "2026-09-17T21:16:39"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603345045894950912",
        "pages": 15,
        "sha256": "e0b95244be641b42",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "cd4042bm.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          9.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cd4042bm-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          9.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "ff16d41897d64de5e026689792a8146b581120630eccc159a3221b165f636c64",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "lingxingic",
      "Package": "SOP-16",
      "Category": "Logic",
      "Pins": "16"
    }
  },
  "variants": [],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "cd4042bm"
  ],
  "discovery_pitch": "CD4042BM (lingxingic) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cd4042bm.kicad_sym",
    "cd4042bm.kicad_mod",
    "cd4042bm.glb",
    "cd4042bm.step",
    "cd4042bm.lbr",
    "docs/hero.png",
    "docs/cd4042bm-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-24T18:41:27.877Z"
}