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CD4026BNSR

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Texas Instruments Counters, Dividers, SO-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CD4026BNSR

Texas Instruments · Counters, Dividers · SO-16

CD4026BNSR from Texas Instruments, in a SO-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CLOCK input Schmitt-triggered clock input; the counter advances on the positive clock transition when CLOCK INHIBIT is low, with input range -0.5 V to VDD+0.5 V.
2 CLOCK INHIBIT input When high it inhibits counter advancement via the clock line, and when low the counter advances on the positive clock edge; it can serve as a negative-edge clock if the clock line is held high.
3 DISPLAY ENABLE IN input When low the seven decoded outputs are forced low regardless of counter state, and when high the decoded outputs are active.
4 DISPLAY ENABLE OUT output Display enable output, which follows DISPLAY ENABLE IN.
5 CARRY OUT output Carry output (CLOCK ÷ 10) that completes one cycle every ten clock input cycles to clock the next decade, and is not gated by DISPLAY ENABLE.
6 f output Decoded 7-segment output f, which goes high to illuminate segment f only when DISPLAY ENABLE IN is high.
7 g output Decoded 7-segment output g, which goes high to illuminate segment g only when DISPLAY ENABLE IN is high.
8 VSS power_in Ground (VSS) supply terminal, the reference for all voltage ratings.
9 d output Decoded 7-segment output d, which goes high to illuminate segment d only when DISPLAY ENABLE IN is high.
10 a output Decoded 7-segment output a, which goes high to illuminate segment a only when DISPLAY ENABLE IN is high.
11 e output Decoded 7-segment output e, which goes high to illuminate segment e only when DISPLAY ENABLE IN is high.
12 b output Decoded 7-segment output b, which goes high to illuminate segment b only when DISPLAY ENABLE IN is high.
13 c output Decoded 7-segment output c, which goes high to illuminate segment c only when DISPLAY ENABLE IN is high.
14 UNGATED "C" SEGMENT OUT output Ungated C-segment output that is not gated by DISPLAY ENABLE and is available continuously, for divide-by-60 and divide-by-12 functions.
15 RESET input A high level clears the decade counter to its zero count.
16 VDD power_in Positive supply, recommended 3 V to 18 V over the full temperature range, with an absolute maximum of -0.5 V to +20 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SO-16
Category Logic
Pins 16

CAD (KiCad official)

  • Symbol: CD4026BNSR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SO-16 (KiCad packages3D, STEP)
  • 3D model files: cd4026bnsr-etched.step / cd4026bnsr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4026bnsr.step / cd4026bnsr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (19 pp, sha256 7ac59b14788365ef, retrieved 2026-10-03, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF