component
CD4026BNSR
Public Made by Adomby adom
Texas Instruments Counters, Dividers, SO-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
README.mdadded+52@@ -0,0 +1,52 @@+# CD4026BNSR++**Texas Instruments** · Counters, Dividers · SO-16++CD4026BNSR from Texas Instruments, in a SO-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | CLOCK | input | Schmitt-triggered clock input; the counter advances on the positive clock transition when CLOCK INHIBIT is low, with input range -0.5 V to VDD+0.5 V. |+| 2 | CLOCK INHIBIT | input | When high it inhibits counter advancement via the clock line, and when low the counter advances on the positive clock edge; it can serve as a negative-edge clock if the clock line is held high. |+| 3 | DISPLAY ENABLE IN | input | When low the seven decoded outputs are forced low regardless of counter state, and when high the decoded outputs are active. |+| 4 | DISPLAY ENABLE OUT | output | Display enable output, which follows DISPLAY ENABLE IN. |+| 5 | CARRY OUT | output | Carry output (CLOCK ÷ 10) that completes one cycle every ten clock input cycles to clock the next decade, and is not gated by DISPLAY ENABLE. |+| 6 | f | output | Decoded 7-segment output f, which goes high to illuminate segment f only when DISPLAY ENABLE IN is high. |+| 7 | g | output | Decoded 7-segment output g, which goes high to illuminate segment g only when DISPLAY ENABLE IN is high. |+| 8 | VSS | power_in | Ground (VSS) supply terminal, the reference for all voltage ratings. |+| 9 | d | output | Decoded 7-segment output d, which goes high to illuminate segment d only when DISPLAY ENABLE IN is high. |+| 10 | a | output | Decoded 7-segment output a, which goes high to illuminate segment a only when DISPLAY ENABLE IN is high. |+| 11 | e | output | Decoded 7-segment output e, which goes high to illuminate segment e only when DISPLAY ENABLE IN is high. |+| 12 | b | output | Decoded 7-segment output b, which goes high to illuminate segment b only when DISPLAY ENABLE IN is high. |+| 13 | c | output | Decoded 7-segment output c, which goes high to illuminate segment c only when DISPLAY ENABLE IN is high. |+| 14 | UNGATED "C" SEGMENT OUT | output | Ungated C-segment output that is not gated by DISPLAY ENABLE and is available continuously, for divide-by-60 and divide-by-12 functions. |+| 15 | RESET | input | A high level clears the decade counter to its zero count. |+| 16 | VDD | power_in | Positive supply, recommended 3 V to 18 V over the full temperature range, with an absolute maximum of -0.5 V to +20 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SO-16 |+| Category | Logic |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `CD4026BNSR`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SO-16 (KiCad packages3D, STEP)+- 3D model files: `cd4026bnsr-etched.step` / `cd4026bnsr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4026bnsr.step` / `cd4026bnsr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cd4033b) (19 pp, sha256 `7ac59b14788365ef`, retrieved 2026-10-03, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd4026bnsr-datasheet.pdf)
page.jsonadded+208@@ -0,0 +1,208 @@+{+ "slug": "cd4026bnsr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Counters, Dividers, SO-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "cd4026bnsr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "cd4026bnsr.kicad_sym",+ "cd4026bnsr.kicad_mod",+ "cd4026bnsr.glb",+ "cd4026bnsr.step",+ "cd4026bnsr.lbr",+ "docs/hero.png",+ "docs/cd4026bnsr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "cd4026bnsr-hero.glb",+ "cd4026bnsr-hero.overlay.json"+ ],+ "component": {+ "mpn": "CD4026BNSR",+ "manufacturer": "Texas Instruments",+ "package": "SO-16",+ "pin_count": 16,+ "category": "Logic",+ "subcategory": "Counters, Dividers",+ "datasheet": "https://www.ti.com/cn/lit/gpn/cd4033b",+ "parts": {+ "symbol": "cd4026bnsr.kicad_sym",+ "footprint": "cd4026bnsr.kicad_mod",+ "model_3d": "cd4026bnsr-hero.glb",+ "model_3d_plain": "cd4026bnsr.glb",+ "model_3d_step": "cd4026bnsr-etched.step",+ "model_3d_step_plain": "cd4026bnsr.step",+ "lbr": "cd4026bnsr.lbr"+ },+ "distributor_links": {+ "lcsc": 727901,+ "digikey": "296-28693-2-ND",+ "mouser": "595-CD4026BNSR"+ },+ "distributor_check": {+ "checked_at": "2026-10-03T03:20:00Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-28693-2-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-CD4026BNSR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "CLOCK",+ "type": "input",+ "description": "Schmitt-triggered clock input; the counter advances on the positive clock transition when CLOCK INHIBIT is low, with input range -0.5 V to VDD+0.5 V."+ },+ {+ "number": "2",+ "name": "CLOCK INHIBIT",+ "type": "input",+ "description": "When high it inhibits counter advancement via the clock line, and when low the counter advances on the positive clock edge; it can serve as a negative-edge clock if the clock line is held high."+ },+ {+ "number": "3",+ "name": "DISPLAY ENABLE IN",+ "type": "input",+ "description": "When low the seven decoded outputs are forced low regardless of counter state, and when high the decoded outputs are active."+ },+ {+ "number": "4",+ "name": "DISPLAY ENABLE OUT",+ "type": "output",+ "description": "Display enable output, which follows DISPLAY ENABLE IN."+ },+ {+ "number": "5",+ "name": "CARRY OUT",+ "type": "output",+ "description": "Carry output (CLOCK ÷ 10) that completes one cycle every ten clock input cycles to clock the next decade, and is not gated by DISPLAY ENABLE."+ },+ {+ "number": "6",+ "name": "f",+ "type": "output",+ "description": "Decoded 7-segment output f, which goes high to illuminate segment f only when DISPLAY ENABLE IN is high."+ },+ {+ "number": "7",+ "name": "g",+ "type": "output",+ "description": "Decoded 7-segment output g, which goes high to illuminate segment g only when DISPLAY ENABLE IN is high."+ },+ {+ "number": "8",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground (VSS) supply terminal, the reference for all voltage ratings."+ },+ {+ "number": "9",+ "name": "d",+ "type": "output",+ "description": "Decoded 7-segment output d, which goes high to illuminate segment d only when DISPLAY ENABLE IN is high."+ },+ {+ "number": "10",+ "name": "a",+ "type": "output",+ "description": "Decoded 7-segment output a, which goes high to illuminate segment a only when DISPLAY ENABLE IN is high."+ },+ {+ "number": "11",+ "name": "e",+ "type": "output",+ "description": "Decoded 7-segment output e, which goes high to illuminate segment e only when DISPLAY ENABLE IN is high."+ },+ {+ "number": "12",+ "name": "b",+ "type": "output",+ "description": "Decoded 7-segment output b, which goes high to illuminate segment b only when DISPLAY ENABLE IN is high."+ },+ {+ "number": "13",+ "name": "c",+ "type": "output",+ "description": "Decoded 7-segment output c, which goes high to illuminate segment c only when DISPLAY ENABLE IN is high."+ },+ {+ "number": "14",+ "name": "UNGATED \"C\" SEGMENT OUT",+ "type": "output",+ "description": "Ungated C-segment output that is not gated by DISPLAY ENABLE and is available continuously, for divide-by-60 and divide-by-12 functions."+ },+ {+ "number": "15",+ "name": "RESET",+ "type": "input",+ "description": "A high level clears the decade counter to its zero count."+ },+ {+ "number": "16",+ "name": "VDD",+ "type": "power_in",+ "description": "Positive supply, recommended 3 V to 18 V over the full temperature range, with an absolute maximum of -0.5 V to +20 V."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-sonnet-5-5",+ "primary_mode": "vision",+ "consensus_model": "claude-opus-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The datasheet gives one terminal diagram (top view, 16 pins) for the DIP, SOIC (NSR) and TSSOP packa",+ "vision extraction: provenance cannot be text-verified; needs consensus"+ ],+ "pages_sent": 12,+ "cost_usd": 0.1877,+ "at": "2026-10-03T03:19:36"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/cd4033b",+ "pages": 19,+ "sha256": "7ac59b14788365ef",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}