component
CD4024BM96
Public Made by Adomby adom
Texas Instruments Counters, Dividers, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
cd4024bm96: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body…
75acc36
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"manufacturer": "Texas Instruments",
"package": "SOIC-14",
"pin_count": 14,
"category": "Logic",
"subcategory": "Counters, Dividers",
"datasheet": "https://www.ti.com/cn/lit/gpn/cd4024b",
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"pins": [
{
"number": "1",
"name": "φ",
"type": "input",
"description": "Input pulse (clock). Counter advances one count on the negative (falling) transition of each input pulse. Schmitt-trigger input permits unlimited rise/fall times."
},
{
"number": "2",
"name": "RESET",
"type": "input",
"description": "Active-high asynchronous common reset. A high level on RESET clears all seven counter stages (Q1-Q7) to zero."
},
{
"number": "3",
"name": "Q7",
"type": "output",
"description": "Buffered output of the 7th (final) counter stage. Divides the input clock by 128."
},
{
"number": "4",
"name": "Q6",
"type": "output",
"description": "Buffered output of the 6th counter stage. Divides the input clock by 64."
},
{
"number": "5",
"name": "Q5",
"type": "output",
"description": "Buffered output of the 5th counter stage. Divides the input clock by 32."
},
{
"number": "6",
"name": "Q4",
"type": "output",
"description": "Buffered output of the 4th counter stage. Divides the input clock by 16."
},
{
"number": "7",
"name": "VSS",
"type": "power_in",
"description": "Negative supply / ground reference. Typically tied to 0 V."
},
{
"number": "8",
"name": "NC",
"type": "unconnected",
"description": "No internal connection. Marked NC in the CD4024B terminal-assignment diagram (NC = 8, 10, 13)."
},
{
"number": "9",
"name": "Q3",
"type": "output",
"description": "Buffered output of the 3rd counter stage. Divides the input clock by 8."
},
{
"number": "10",
"name": "NC",
"type": "unconnected",
"description": "No internal connection. Marked NC in the CD4024B terminal-assignment diagram (NC = 8, 10, 13)."
},
{
"number": "11",
"name": "Q2",
"type": "output",
"description": "Buffered output of the 2nd counter stage. Divides the input clock by 4."
},
{
"number": "12",
"name": "Q1",
"type": "output",
"description": "Buffered output of the 1st counter stage. Divides the input clock by 2."
},
{
"number": "13",
"name": "NC",
"type": "unconnected",
"description": "No internal connection. Marked NC in the CD4024B terminal-assignment diagram (NC = 8, 10, 13)."
},
{
"number": "14",
"name": "VDD",
"type": "power_in",
"description": "Positive supply. Rated 3 V to 18 V (absolute max -0.5 V to +20 V). B-series parametrics specified at 5 V, 10 V, and 15 V."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/cd4024b",
"pages": 30,
"sha256": "6c727e4dd1c8af65",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 14,
"described": 14,
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}
},
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"logic": {
"family_id": "CD4024",
"logic_family": "CD4000",
"function_code": "4024",
"function_class": null,
"function_name": null,
"manufacturer": "Texas Instruments",
"is_specialty": false
},
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"up": "Z",
"units": "mm",
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"seat": "z = 0",
"extents_mm": [
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"checked": "2026-10-21",
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"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "SOIC-14",
"Category": "Logic",
"Pins": "14"
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"kind": "packaging"
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{
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},
{
"mpn": "CD4024BM96MT",
"kind": "packaging"
},
{
"mpn": "CD4024BM96E",
"kind": "packaging"
},
{
"mpn": "CD4024BM96F",
"kind": "packaging"
},
{
"mpn": "CD4024BM96F3A",
"kind": "packaging"
},
{
"mpn": "CD4024BM96NSR",
"kind": "packaging"
},
{
"mpn": "CD4024BM96PW",
"kind": "packaging"
},
{
"mpn": "CD4024BM96PWR",
"kind": "packaging"
}
],
"sections": [
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],
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"discovery_pitch": "CD4024BM96 (Texas Instruments) component page with datasheet-verified CAD.",
"author": {
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"docs/cd4024bm96-datasheet.pdf",
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"visibility": {
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},
"updated_at": "2026-09-24T18:40:40.238Z"
}