CD4021BE

{
  "slug": "cd4021be",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Shift Registers, DIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "logic",
    "cd4021be",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cd4021be.kicad_sym",
    "cd4021be.kicad_mod",
    "cd4021be.glb",
    "cd4021be.step",
    "cd4021be.lbr",
    "docs/hero.png",
    "docs/cd4021be-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "cd4021be-hero.glb",
    "cd4021be-hero.overlay.json"
  ],
  "component": {
    "mpn": "CD4021BE",
    "manufacturer": "Texas Instruments",
    "package": "DIP-16",
    "pin_count": 16,
    "category": "Logic",
    "subcategory": "Shift Registers",
    "datasheet": "https://www.ti.com/cn/lit/gpn/cd4021b",
    "parts": {
      "symbol": "cd4021be.kicad_sym",
      "footprint": "cd4021be.kicad_mod",
      "model_3d": "cd4021be-hero.glb",
      "model_3d_plain": "cd4021be.glb",
      "model_3d_step": "cd4021be-etched.step",
      "model_3d_step_plain": "cd4021be.step",
      "lbr": "cd4021be.lbr"
    },
    "distributor_links": {
      "lcsc": "C139390",
      "digikey": "296-2040-5-ND",
      "mouser": "595-CD4021BE"
    },
    "distributor_check": {
      "checked_at": "2026-10-06T00:59:33Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-2040-5-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "595-CD4021BE",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "PI-8",
        "type": "input",
        "description": "Parallel jam input to register stage 8, with input voltage limited to -0.5 V to VDD+0.5 V."
      },
      {
        "number": "2",
        "name": "Q6",
        "type": "output",
        "description": "Buffered output from register stage 6."
      },
      {
        "number": "3",
        "name": "Q8",
        "type": "output",
        "description": "Buffered serial output from register stage 8."
      },
      {
        "number": "4",
        "name": "PI-4",
        "type": "input",
        "description": "Parallel jam input to register stage 4, with input voltage limited to -0.5 V to VDD+0.5 V."
      },
      {
        "number": "5",
        "name": "PI-3",
        "type": "input",
        "description": "Parallel jam input to register stage 3, with input voltage limited to -0.5 V to VDD+0.5 V."
      },
      {
        "number": "6",
        "name": "PI-2",
        "type": "input",
        "description": "Parallel jam input to register stage 2, with input voltage limited to -0.5 V to VDD+0.5 V."
      },
      {
        "number": "7",
        "name": "PI-1",
        "type": "input",
        "description": "Parallel jam input to register stage 1, with input voltage limited to -0.5 V to VDD+0.5 V."
      },
      {
        "number": "8",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground (negative supply) reference terminal; supply voltages are referenced to VSS."
      },
      {
        "number": "9",
        "name": "PARALLEL/SERIAL CONTROL",
        "type": "input",
        "description": "Low shifts data serially on the positive clock edge; high asynchronously jams the parallel inputs into the 8-stage register."
      },
      {
        "number": "10",
        "name": "CLOCK",
        "type": "input",
        "description": "Common clock input; serial shifting occurs on the positive clock transition."
      },
      {
        "number": "11",
        "name": "SERIAL IN",
        "type": "input",
        "description": "Single serial data input, shifted into the register synchronously with the clock when parallel/serial control is low."
      },
      {
        "number": "12",
        "name": "Q7",
        "type": "output",
        "description": "Buffered output from register stage 7."
      },
      {
        "number": "13",
        "name": "PI-5",
        "type": "input",
        "description": "Parallel jam input to register stage 5, with input voltage limited to -0.5 V to VDD+0.5 V."
      },
      {
        "number": "14",
        "name": "PI-6",
        "type": "input",
        "description": "Parallel jam input to register stage 6, with input voltage limited to -0.5 V to VDD+0.5 V."
      },
      {
        "number": "15",
        "name": "PI-7",
        "type": "input",
        "description": "Parallel jam input to register stage 7, with input voltage limited to -0.5 V to VDD+0.5 V."
      },
      {
        "number": "16",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply voltage, recommended 3 V to 18 V, absolute maximum -0.5 V to +20 V referenced to VSS."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "vision",
        "consensus_model": "claude-opus-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Datasheet covers CD4014B and CD4021B together; the pinout is a shared terminal diagram. The 16-lead ",
          "vision extraction: provenance cannot be text-verified; needs consensus"
        ],
        "pages_sent": 12,
        "cost_usd": 0.1468,
        "at": "2026-10-06T00:59:15"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/cd4021b",
        "pages": 29,
        "sha256": "078cf8019db65cb7",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    }
  }
}