CD4020B 14-Stage Counter

{
  "schema_version": 1,
  "type": "component",
  "slug": "cd4020",
  "title": "CD4020B 14-Stage Counter",
  "brief": "14-stage ripple-carry binary counter with a buffered clock input, 3 V to 18 V.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "logic",
    "counter",
    "ripple-counter",
    "binary",
    "4000-series",
    "ti",
    "soic-16"
  ],
  "component": {
    "mpn": "CD4020B",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-16",
    "pin_count": 16,
    "category": "Logic",
    "subcategory": "Counter",
    "datasheet": "https://www.ti.com/lit/ds/symlink/cd4020b.pdf",
    "parts": {
      "symbol": "cd4020.kicad_sym",
      "footprint": "cd4020.kicad_mod",
      "model_3d": "cd4020-etched.glb",
      "model_3d_plain": "cd4020.glb",
      "lbr": "cd4020.lbr",
      "model_3d_step": "cd4020-etched.step",
      "model_3d_step_plain": "cd4020.step"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "Q12",
        "type": "output",
        "description": "Buffered counter output, stage 12 (divide-by-4096)."
      },
      {
        "number": "2",
        "name": "Q13",
        "type": "output",
        "description": "Buffered counter output, stage 13 (divide-by-8192)."
      },
      {
        "number": "3",
        "name": "Q14",
        "type": "output",
        "description": "Buffered counter output, stage 14 (divide-by-16384)."
      },
      {
        "number": "4",
        "name": "Q6",
        "type": "output",
        "description": "Buffered counter output, stage 6 (divide-by-64)."
      },
      {
        "number": "5",
        "name": "Q5",
        "type": "output",
        "description": "Buffered counter output, stage 5 (divide-by-32)."
      },
      {
        "number": "6",
        "name": "Q7",
        "type": "output",
        "description": "Buffered counter output, stage 7 (divide-by-128)."
      },
      {
        "number": "7",
        "name": "Q4",
        "type": "output",
        "description": "Buffered counter output, stage 4 (divide-by-16)."
      },
      {
        "number": "8",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground reference / negative supply (0 V)."
      },
      {
        "number": "9",
        "name": "Q1",
        "type": "output",
        "description": "Buffered counter output, stage 1 (divide-by-2). Stages 2 and 3 are internal and not brought out."
      },
      {
        "number": "10",
        "name": "CLOCK",
        "type": "input",
        "description": "Clock input. Counter advances one count on each high-to-low (negative-going) transition. Schmitt-triggered on CD4020B."
      },
      {
        "number": "11",
        "name": "RESET",
        "type": "input",
        "description": "Asynchronous master reset, active HIGH. When RESET is high all counter outputs (Q1, Q4-Q14) are forced to logic 0 regardless of the CLOCK state."
      },
      {
        "number": "12",
        "name": "Q9",
        "type": "output",
        "description": "Buffered counter output, stage 9 (divide-by-512)."
      },
      {
        "number": "13",
        "name": "Q8",
        "type": "output",
        "description": "Buffered counter output, stage 8 (divide-by-256)."
      },
      {
        "number": "14",
        "name": "Q10",
        "type": "output",
        "description": "Buffered counter output, stage 10 (divide-by-1024)."
      },
      {
        "number": "15",
        "name": "Q11",
        "type": "output",
        "description": "Buffered counter output, stage 11 (divide-by-2048)."
      },
      {
        "number": "16",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply, 3 V to 18 V (recommended 3 V to 15 V)."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/cd4020b.pdf",
        "pages": 30,
        "sha256": "6c727e4dd1c8af65",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "logic": {
      "family_id": "CD4020",
      "logic_family": "CD4000",
      "function_code": "4020",
      "function_class": "Counter",
      "function_name": "14-Bit Binary Counter",
      "manufacturer": "Texas Instruments",
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "cd4020.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cd4020-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "4ac5b3bb0435bafd88944049924c2bccc309b84bdbbf7db38196c104312dbefb",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Type": "14-stage ripple binary counter",
      "Logic family": "4000B (CMOS)",
      "Available outputs": "Q1, Q4 through Q14 (Q2, Q3 internal)",
      "Clock": "External, buffered input",
      "Supply voltage": "3 V to 18 V",
      "Operating temperature": "-55 C to 125 C"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "binary counter",
    "frequency divider",
    "clock divider",
    "ripple counter"
  ],
  "discovery_pitch": "A 14-stage binary counter that divides an input clock down through eleven pinned-out stages for timing and dividers.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cd4020.kicad_sym",
    "cd4020.kicad_mod",
    "cd4020.glb",
    "cd4020.lbr",
    "docs/hero.png",
    "docs/cd4020-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "cd4020-etched.step"
  ],
  "variants": [
    {
      "mpn": "CD4020BE",
      "kind": "unknown"
    },
    {
      "mpn": "CD4020BEE4",
      "kind": "unknown"
    },
    {
      "mpn": "CD4020BM",
      "kind": "unknown"
    },
    {
      "mpn": "CD4020BM96",
      "kind": "unknown"
    },
    {
      "mpn": "CD4020BMT",
      "kind": "unknown"
    },
    {
      "mpn": "CD4020BPW",
      "kind": "unknown"
    },
    {
      "mpn": "CD4020BPWR",
      "kind": "unknown"
    }
  ]
}