component
CD4013BM
Public Made by Adomby adom
lingxingic Flip Flops, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
Ray
Initial commit: component/cd4013bm
3c8f199
CD4013BM
lingxingic · Flip Flops · SOP-14
CD4013BM from lingxingic, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1Q | output | True output of flip-flop 1; latches data on positive clock edge |
| 2 | /1Q | output | Complement output of flip-flop 1; inverted state of 1Q |
| 3 | 1CP | input | Clock input for flip-flop 1; positive-going edge (LOW to HIGH) triggers data transfer |
| 4 | 1CD | input | Asynchronous clear-direct input for flip-flop 1; active HIGH, overrides clock and data inputs |
| 5 | 1D | input | Data input for flip-flop 1; sampled when clock input is LOW |
| 6 | 1SD | input | Asynchronous set-direct input for flip-flop 1; active HIGH, overrides clock and data inputs |
| 7 | VSS | power_in | Ground (0V); voltage reference for the device |
| 8 | 2SD | input | Asynchronous set-direct input for flip-flop 2; active HIGH, overrides clock and data inputs |
| 9 | 2D | input | Data input for flip-flop 2; sampled when clock input is LOW |
| 10 | 2CD | input | Asynchronous clear-direct input for flip-flop 2; active HIGH, overrides clock and data inputs |
| 11 | 2CP | input | Clock input for flip-flop 2; positive-going edge (LOW to HIGH) triggers data transfer |
| 12 | /2Q | output | Complement output of flip-flop 2; inverted state of 2Q |
| 13 | 2Q | output | True output of flip-flop 2; latches data on positive clock edge |
| 14 | VDD | power_in | Supply voltage; operating range 3V to 15V referenced to VSS |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | lingxingic |
| Package | SOP-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
CD4013BM - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files:
cd4013bm-etched.step/cd4013bm-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4013bm.step/cd4013bm.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: lingxingic datasheet (13 pp, sha256
47caca260b77c03e, retrieved 2026-09-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CD4013BM
**lingxingic** · Flip Flops · SOP-14
CD4013BM from lingxingic, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1Q | output | True output of flip-flop 1; latches data on positive clock edge |
| 2 | /1Q | output | Complement output of flip-flop 1; inverted state of 1Q |
| 3 | 1CP | input | Clock input for flip-flop 1; positive-going edge (LOW to HIGH) triggers data transfer |
| 4 | 1CD | input | Asynchronous clear-direct input for flip-flop 1; active HIGH, overrides clock and data inputs |
| 5 | 1D | input | Data input for flip-flop 1; sampled when clock input is LOW |
| 6 | 1SD | input | Asynchronous set-direct input for flip-flop 1; active HIGH, overrides clock and data inputs |
| 7 | VSS | power_in | Ground (0V); voltage reference for the device |
| 8 | 2SD | input | Asynchronous set-direct input for flip-flop 2; active HIGH, overrides clock and data inputs |
| 9 | 2D | input | Data input for flip-flop 2; sampled when clock input is LOW |
| 10 | 2CD | input | Asynchronous clear-direct input for flip-flop 2; active HIGH, overrides clock and data inputs |
| 11 | 2CP | input | Clock input for flip-flop 2; positive-going edge (LOW to HIGH) triggers data transfer |
| 12 | /2Q | output | Complement output of flip-flop 2; inverted state of 2Q |
| 13 | 2Q | output | True output of flip-flop 2; latches data on positive clock edge |
| 14 | VDD | power_in | Supply voltage; operating range 3V to 15V referenced to VSS |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | lingxingic |
| Package | SOP-14 |
| Category | Logic |
| Pins | 14 |
## CAD (KiCad official)
- Symbol: `CD4013BM`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files: `cd4013bm-etched.step` / `cd4013bm-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4013bm.step` / `cd4013bm.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [lingxingic datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603388816593854464) (13 pp, sha256 `47caca260b77c03e`, retrieved 2026-09-22, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cd4013bm-datasheet.pdf)