component
CD4013BM
Public Made by Adomby adom
lingxingic Flip Flops, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+50@@ -0,0 +1,50 @@+# CD4013BM++**lingxingic** · Flip Flops · SOP-14++CD4013BM from lingxingic, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1Q | output | True output of flip-flop 1; latches data on positive clock edge |+| 2 | /1Q | output | Complement output of flip-flop 1; inverted state of 1Q |+| 3 | 1CP | input | Clock input for flip-flop 1; positive-going edge (LOW to HIGH) triggers data transfer |+| 4 | 1CD | input | Asynchronous clear-direct input for flip-flop 1; active HIGH, overrides clock and data inputs |+| 5 | 1D | input | Data input for flip-flop 1; sampled when clock input is LOW |+| 6 | 1SD | input | Asynchronous set-direct input for flip-flop 1; active HIGH, overrides clock and data inputs |+| 7 | VSS | power_in | Ground (0V); voltage reference for the device |+| 8 | 2SD | input | Asynchronous set-direct input for flip-flop 2; active HIGH, overrides clock and data inputs |+| 9 | 2D | input | Data input for flip-flop 2; sampled when clock input is LOW |+| 10 | 2CD | input | Asynchronous clear-direct input for flip-flop 2; active HIGH, overrides clock and data inputs |+| 11 | 2CP | input | Clock input for flip-flop 2; positive-going edge (LOW to HIGH) triggers data transfer |+| 12 | /2Q | output | Complement output of flip-flop 2; inverted state of 2Q |+| 13 | 2Q | output | True output of flip-flop 2; latches data on positive clock edge |+| 14 | VDD | power_in | Supply voltage; operating range 3V to 15V referenced to VSS |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | lingxingic |+| Package | SOP-14 |+| Category | Logic |+| Pins | 14 |++## CAD (KiCad official)++- Symbol: `CD4013BM`+- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`+- 3D model: SOP-14 (KiCad packages3D, STEP)+- 3D model files: `cd4013bm-etched.step` / `cd4013bm-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4013bm.step` / `cd4013bm.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [lingxingic datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603388816593854464) (13 pp, sha256 `47caca260b77c03e`, retrieved 2026-09-22, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd4013bm-datasheet.pdf)
page.jsonadded+177@@ -0,0 +1,177 @@+{+ "slug": "cd4013bm",+ "version": "0.1.0",+ "type": "component",+ "description": "lingxingic Flip Flops, SOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "cd4013bm",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "cd4013bm.kicad_sym",+ "cd4013bm.kicad_mod",+ "cd4013bm.glb",+ "cd4013bm.step",+ "cd4013bm.lbr",+ "docs/hero.png",+ "docs/cd4013bm-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "CD4013BM",+ "manufacturer": "lingxingic",+ "package": "SOP-14",+ "pin_count": 14,+ "category": "Logic",+ "subcategory": "Flip Flops",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603388816593854464",+ "parts": {+ "symbol": "cd4013bm.kicad_sym",+ "footprint": "cd4013bm.kicad_mod",+ "model_3d": "cd4013bm-etched.glb",+ "model_3d_plain": "cd4013bm.glb",+ "model_3d_step": "cd4013bm-etched.step",+ "model_3d_step_plain": "cd4013bm.step",+ "lbr": "cd4013bm.lbr"+ },+ "distributor_links": {+ "lcsc": "C32710666"+ },+ "pins": [+ {+ "number": "1",+ "name": "1Q",+ "type": "output",+ "description": "True output of flip-flop 1; latches data on positive clock edge"+ },+ {+ "number": "2",+ "name": "/1Q",+ "type": "output",+ "description": "Complement output of flip-flop 1; inverted state of 1Q"+ },+ {+ "number": "3",+ "name": "1CP",+ "type": "input",+ "description": "Clock input for flip-flop 1; positive-going edge (LOW to HIGH) triggers data transfer"+ },+ {+ "number": "4",+ "name": "1CD",+ "type": "input",+ "description": "Asynchronous clear-direct input for flip-flop 1; active HIGH, overrides clock and data inputs"+ },+ {+ "number": "5",+ "name": "1D",+ "type": "input",+ "description": "Data input for flip-flop 1; sampled when clock input is LOW"+ },+ {+ "number": "6",+ "name": "1SD",+ "type": "input",+ "description": "Asynchronous set-direct input for flip-flop 1; active HIGH, overrides clock and data inputs"+ },+ {+ "number": "7",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground (0V); voltage reference for the device"+ },+ {+ "number": "8",+ "name": "2SD",+ "type": "input",+ "description": "Asynchronous set-direct input for flip-flop 2; active HIGH, overrides clock and data inputs"+ },+ {+ "number": "9",+ "name": "2D",+ "type": "input",+ "description": "Data input for flip-flop 2; sampled when clock input is LOW"+ },+ {+ "number": "10",+ "name": "2CD",+ "type": "input",+ "description": "Asynchronous clear-direct input for flip-flop 2; active HIGH, overrides clock and data inputs"+ },+ {+ "number": "11",+ "name": "2CP",+ "type": "input",+ "description": "Clock input for flip-flop 2; positive-going edge (LOW to HIGH) triggers data transfer"+ },+ {+ "number": "12",+ "name": "/2Q",+ "type": "output",+ "description": "Complement output of flip-flop 2; inverted state of 2Q"+ },+ {+ "number": "13",+ "name": "2Q",+ "type": "output",+ "description": "True output of flip-flop 2; latches data on positive clock edge"+ },+ {+ "number": "14",+ "name": "VDD",+ "type": "power_in",+ "description": "Supply voltage; operating range 3V to 15V referenced to VSS"+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-4-6",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 13,+ "cost_usd": 0.1823,+ "at": "2026-09-22T10:18:41"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603388816593854464",+ "pages": 13,+ "sha256": "47caca260b77c03e",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 14,+ "described": 14,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}