CD4012BM

{
  "slug": "cd4012bm",
  "version": "0.1.0",
  "type": "component",
  "description": "lingxingic Logic Gates, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "logic",
    "cd4012bm",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cd4012bm.kicad_sym",
    "cd4012bm.kicad_mod",
    "cd4012bm.glb",
    "cd4012bm.step",
    "cd4012bm.lbr",
    "docs/hero.png",
    "docs/cd4012bm-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "cd4012bm-hero.glb",
    "cd4012bm-hero.overlay.json",
    "cd4012bm-etched.glb"
  ],
  "component": {
    "mpn": "CD4012BM",
    "manufacturer": "lingxingic",
    "package": "SOP-14",
    "pin_count": 14,
    "category": "Logic",
    "subcategory": "Logic Gates",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603345039142121472",
    "parts": {
      "symbol": "cd4012bm.kicad_sym",
      "footprint": "cd4012bm.kicad_mod",
      "model_3d": "cd4012bm-hero.glb",
      "model_3d_plain": "cd4012bm-etched.glb",
      "model_3d_step": "cd4012bm-etched.step",
      "model_3d_step_plain": "cd4012bm.step",
      "lbr": "cd4012bm.lbr"
    },
    "distributor_links": {
      "lcsc": "C22390233"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T13:31:35Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "1Y",
        "type": "output",
        "description": "Output of NAND gate 1; fully buffered, and it goes LOW only when all four of 1A, 1B, 1C and 1D are HIGH."
      },
      {
        "number": "2",
        "name": "1A",
        "type": "input",
        "description": "Data input 1A of NAND gate 1; unused inputs must be connected to VDD, GND, or another input."
      },
      {
        "number": "3",
        "name": "1B",
        "type": "input",
        "description": "Data input 1B of NAND gate 1; unused inputs must be connected to VDD, GND, or another input."
      },
      {
        "number": "4",
        "name": "1C",
        "type": "input",
        "description": "Data input 1C of NAND gate 1; unused inputs must be connected to VDD, GND, or another input."
      },
      {
        "number": "5",
        "name": "1D",
        "type": "input",
        "description": "Data input 1D of NAND gate 1; unused inputs must be connected to VDD, GND, or another input."
      },
      {
        "number": "6",
        "name": "NC",
        "type": "unconnected",
        "description": "No connection."
      },
      {
        "number": "7",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference (0 V); all voltages are referenced to GND, and VDD must be within 3 V to 15 V recommended operating range."
      },
      {
        "number": "8",
        "name": "NC",
        "type": "unconnected",
        "description": "No connection."
      },
      {
        "number": "9",
        "name": "2A",
        "type": "input",
        "description": "Data input 2A of NAND gate 2; unused inputs must be connected to VDD, GND, or another input."
      },
      {
        "number": "10",
        "name": "2B",
        "type": "input",
        "description": "Data input 2B of NAND gate 2; unused inputs must be connected to VDD, GND, or another input."
      },
      {
        "number": "11",
        "name": "2C",
        "type": "input",
        "description": "Data input 2C of NAND gate 2; unused inputs must be connected to VDD, GND, or another input."
      },
      {
        "number": "12",
        "name": "2D",
        "type": "input",
        "description": "Data input 2D of NAND gate 2; unused inputs must be connected to VDD, GND, or another input."
      },
      {
        "number": "13",
        "name": "2Y",
        "type": "output",
        "description": "Output of NAND gate 2; fully buffered, and it goes LOW only when all four of 2A, 2B, 2C and 2D are HIGH."
      },
      {
        "number": "14",
        "name": "VDD",
        "type": "power_in",
        "description": "Supply voltage, recommended range 3 V to 15 V referenced to GND; absolute maximum is 18 V."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The ordering table lists CD4012BM, CD4012BPWR and CD4012BE without clearly tying each part number to; The pin configuration figure text is garbled in extraction. Pin numbers and names were taken from th; The datasheet lists no pin-level electrical limits beyond the supply voltage and the ±10 mA DC input"
        ],
        "pages_sent": 14,
        "cost_usd": 0.052,
        "at": "2026-10-18T13:29:12"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603345039142121472",
        "pages": 14,
        "sha256": "eb56392bc477561c",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "cd4012bm.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          8.7,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cd4012bm-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          8.7,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "cd5af7ff86e912e6532244bd23387fbd75098df9f40346648014fc3c50f32ea6",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}