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CD4011UBM96

Texas Instruments · Logic Gates · SOIC-14

CD4011UBM96 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Input A to NAND gate 1 (with input B, output J); input voltage range -0.5V to VDD+0.5V, max DC input current ±10mA.
2 B input Input B to NAND gate 1 (with input A, output J); input voltage range -0.5V to VDD+0.5V, max DC input current ±10mA.
3 J output Output of NAND gate 1, J = NOT(A AND B).
4 K output Output of NAND gate 2, K = NOT(C AND D).
5 C input Input C to NAND gate 2 (with input D, output K); input voltage range -0.5V to VDD+0.5V, max DC input current ±10mA.
6 D input Input D to NAND gate 2 (with input C, output K); input voltage range -0.5V to VDD+0.5V, max DC input current ±10mA.
7 VSS power_in Negative supply / ground reference terminal, all voltages referenced to VSS.
8 E input Input E to NAND gate 3 (with input F, output L); input voltage range -0.5V to VDD+0.5V, max DC input current ±10mA.
9 F input Input F to NAND gate 3 (with input E, output L); input voltage range -0.5V to VDD+0.5V, max DC input current ±10mA.
10 L output Output of NAND gate 3, L = NOT(E AND F).
11 M output Output of NAND gate 4, M = NOT(G AND H).
12 G input Input G to NAND gate 4 (with input H, output M); input voltage range -0.5V to VDD+0.5V, max DC input current ±10mA.
13 H input Input H to NAND gate 4 (with input G, output M); input voltage range -0.5V to VDD+0.5V, max DC input current ±10mA.
14 VDD power_in Positive supply voltage, absolute maximum -0.5V to +20V referenced to VSS, recommended operating range 3V to 18V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: CD4011UBM96
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: cd4011ubm96-etched.step / cd4011ubm96-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4011ubm96.step / cd4011ubm96.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (20 pp, sha256 62907fabea7494c9, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-sonnet-5 (text+vision), consensus claude-opus-4-8 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF