main
Ray Publish 0.1.0 8d31c0e 16h ago
{
  "slug": "cd4011bm-ms",
  "version": "0.1.0",
  "type": "component",
  "description": "MSKSEMI Logic Gates, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "logic",
    "cd4011bm-ms",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cd4011bm-ms.kicad_sym",
    "cd4011bm-ms.kicad_mod",
    "cd4011bm-ms.glb",
    "cd4011bm-ms.step",
    "cd4011bm-ms.lbr",
    "docs/hero.png",
    "docs/cd4011bm-ms-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "cd4011bm-ms-hero.glb",
    "cd4011bm-ms-hero.overlay.json",
    "cd4011bm-ms-etched.glb"
  ],
  "component": {
    "mpn": "CD4011BM-MS",
    "manufacturer": "MSKSEMI",
    "package": "SOP-14",
    "pin_count": 14,
    "category": "Logic",
    "subcategory": "Logic Gates",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/84795a3673de97e61bffbb086a7e94f9.pdf",
    "parts": {
      "symbol": "cd4011bm-ms.kicad_sym",
      "footprint": "cd4011bm-ms.kicad_mod",
      "model_3d": "cd4011bm-ms-hero.glb",
      "model_3d_plain": "cd4011bm-ms-etched.glb",
      "model_3d_step": "cd4011bm-ms-etched.step",
      "model_3d_step_plain": "cd4011bm-ms.step",
      "lbr": "cd4011bm-ms.lbr"
    },
    "distributor_links": {
      "lcsc": "C7473151"
    },
    "distributor_check": {
      "checked_at": "2026-10-27T23:46:22Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "deferred",
        "error": "shared DigiKey quota guard: 940 calls left today"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "A1",
        "type": "input",
        "description": "Input A of NAND gate 1; recommended input voltage is 0 to VDD V, with absolute input limits of VSS-0.5 V to VDD+0.5 V."
      },
      {
        "number": "2",
        "name": "B1",
        "type": "input",
        "description": "Input B of NAND gate 1; recommended input voltage is 0 to VDD V, with absolute input limits of VSS-0.5 V to VDD+0.5 V."
      },
      {
        "number": "3",
        "name": "Y1",
        "type": "output",
        "description": "Output Y of NAND gate 1; the datasheet gives VOH/VOL and source/sink limits (IOH and IOL) for this output."
      },
      {
        "number": "4",
        "name": "Y2",
        "type": "output",
        "description": "Output Y of NAND gate 2; the datasheet gives VOH/VOL and source/sink limits (IOH and IOL) for this output."
      },
      {
        "number": "5",
        "name": "A2",
        "type": "input",
        "description": "Input A of NAND gate 2; recommended input voltage is 0 to VDD V, with absolute input limits of VSS-0.5 V to VDD+0.5 V."
      },
      {
        "number": "6",
        "name": "B2",
        "type": "input",
        "description": "Input B of NAND gate 2; recommended input voltage is 0 to VDD V, with absolute input limits of VSS-0.5 V to VDD+0.5 V."
      },
      {
        "number": "7",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground/negative supply reference for the device; all voltage limits are referenced to VSS."
      },
      {
        "number": "8",
        "name": "A3",
        "type": "input",
        "description": "Input A of NAND gate 3; recommended input voltage is 0 to VDD V, with absolute input limits of VSS-0.5 V to VDD+0.5 V."
      },
      {
        "number": "9",
        "name": "B3",
        "type": "input",
        "description": "Input B of NAND gate 3; recommended input voltage is 0 to VDD V, with absolute input limits of VSS-0.5 V to VDD+0.5 V."
      },
      {
        "number": "10",
        "name": "Y3",
        "type": "output",
        "description": "Output Y of NAND gate 3; the datasheet gives VOH/VOL and source/sink limits (IOH and IOL) for this output."
      },
      {
        "number": "11",
        "name": "Y4",
        "type": "output",
        "description": "Output Y of NAND gate 4; the datasheet gives VOH/VOL and source/sink limits (IOH and IOL) for this output."
      },
      {
        "number": "12",
        "name": "A4",
        "type": "input",
        "description": "Input A of NAND gate 4; recommended input voltage is 0 to VDD V, with absolute input limits of VSS-0.5 V to VDD+0.5 V."
      },
      {
        "number": "13",
        "name": "B4",
        "type": "input",
        "description": "Input B of NAND gate 4; recommended input voltage is 0 to VDD V, with absolute input limits of VSS-0.5 V to VDD+0.5 V."
      },
      {
        "number": "14",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply; recommended operating voltage is 2.5 V to 15 V, with an absolute maximum rating of -0.5 V to 18 V."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": null,
        "consensus": "skipped (clean text read)",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [],
        "pages_sent": 8,
        "cost_usd": 0.0006,
        "at": "2026-10-27T23:46:02"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/84795a3673de97e61bffbb086a7e94f9.pdf",
        "pages": 8,
        "sha256": "434699158e8ca1ee",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "cd4011bm-ms.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          8.7,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",
        "checked": "2026-10-27",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cd4011bm-ms-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "5a01e071fed48a0c358faf9a85aa1b77ba8a9376b992dfd54ae3ef42e47eb9f8",
        "checked": "2026-10-27",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}