main
Ray cd4001: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) 9fba2b6 28d ago
{
  "schema_version": 1,
  "type": "component",
  "slug": "cd4001",
  "title": "CD4001B Quad NOR Gate",
  "brief": "Quad NOR Gate in the 4000B CMOS family, 3 V to 18 V.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "logic",
    "-gate",
    "4000-series",
    "cmos",
    "ti",
    "soic-14"
  ],
  "component": {
    "mpn": "CD4001B",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-14",
    "pin_count": 14,
    "category": "Logic",
    "subcategory": "Logic Gate",
    "datasheet": "https://www.ti.com/lit/ds/symlink/cd4001b.pdf",
    "parts": {
      "symbol": "cd4001.kicad_sym",
      "footprint": "cd4001.kicad_mod",
      "model_3d": "cd4001-etched.glb",
      "model_3d_plain": "cd4001.glb",
      "model_3d_step": "cd4001-etched.step",
      "model_3d_step_plain": "cd4001.step",
      "lbr": "cd4001.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "A",
        "type": "input",
        "description": "Gate 1 input A (J = A NOR B). CMOS input, high impedance, protected by input protection network. VIH min 3.5 V @ VDD=5 V."
      },
      {
        "number": "2",
        "name": "B",
        "type": "input",
        "description": "Gate 1 input B (J = A NOR B). CMOS input, high impedance, protected by input protection network."
      },
      {
        "number": "3",
        "name": "J",
        "type": "output",
        "description": "Gate 1 output: J = A NOR B. Buffered CMOS output; IOH ≈ −1 mA / IOL ≈ 1 mA min @ VDD=10 V."
      },
      {
        "number": "4",
        "name": "K",
        "type": "output",
        "description": "Gate 2 output: K = C NOR D. Buffered CMOS output."
      },
      {
        "number": "5",
        "name": "C",
        "type": "input",
        "description": "Gate 2 input C (K = C NOR D). CMOS input, high impedance."
      },
      {
        "number": "6",
        "name": "D",
        "type": "input",
        "description": "Gate 2 input D (K = C NOR D). CMOS input, high impedance."
      },
      {
        "number": "7",
        "name": "VSS",
        "type": "power_in",
        "description": "Negative supply / ground reference. Typically 0 V. All input/output voltages referenced to VSS."
      },
      {
        "number": "8",
        "name": "E",
        "type": "input",
        "description": "Gate 3 input E (L = E NOR F). CMOS input, high impedance."
      },
      {
        "number": "9",
        "name": "F",
        "type": "input",
        "description": "Gate 3 input F (L = E NOR F). CMOS input, high impedance."
      },
      {
        "number": "10",
        "name": "L",
        "type": "output",
        "description": "Gate 3 output: L = E NOR F. Buffered CMOS output."
      },
      {
        "number": "11",
        "name": "M",
        "type": "output",
        "description": "Gate 4 output: M = G NOR H. Buffered CMOS output."
      },
      {
        "number": "12",
        "name": "G",
        "type": "input",
        "description": "Gate 4 input G (M = G NOR H). CMOS input, high impedance."
      },
      {
        "number": "13",
        "name": "H",
        "type": "input",
        "description": "Gate 4 input H (M = G NOR H). CMOS input, high impedance."
      },
      {
        "number": "14",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply voltage. Recommended 3 V to 18 V (absolute max −0.5 V to +20 V referenced to VSS). Bypass with 0.1 µF ceramic to VSS."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/cd4001b.pdf",
        "pages": 23,
        "sha256": "d33d12a8e68dd293",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "logic": {
      "family_id": "CD4001",
      "logic_family": "CD4000",
      "function_code": "4001",
      "function_class": "Gate",
      "function_name": "Quad 2-Input NOR Gate",
      "manufacturer": "Texas Instruments",
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "cd4001.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          8.7,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cd4001-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          8.7,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "666f2c38443181d930c489b9e8583797ef74f63e694ec91deff5e0eb3595076b",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Type": "Quad NOR Gate",
      "Logic family": "4000B (CMOS)",
      "Supply voltage": "3 V to 18 V",
      "Propagation delay": "45 ns typ at 10 V",
      "Operating temperature": "-55 C to 125 C"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "NOR gate",
    "CMOS logic",
    "wide-voltage logic",
    "glue logic"
  ],
  "discovery_pitch": "The CD4001B contains four independent 2-input NOR gates in the 4000B CMOS family; each output is high only when both inputs are low.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cd4001.kicad_sym",
    "cd4001.kicad_mod",
    "cd4001.glb",
    "cd4001.step",
    "cd4001.lbr",
    "docs/hero.png",
    "docs/cd4001-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "cd4001-etched.step"
  ],
  "variants": [
    {
      "mpn": "CD4001BE",
      "kind": "unknown"
    },
    {
      "mpn": "CD4001BE.A",
      "kind": "unknown"
    },
    {
      "mpn": "CD4001BEE4",
      "kind": "unknown"
    },
    {
      "mpn": "CD4001BF",
      "kind": "unknown"
    },
    {
      "mpn": "CD4001BF.A",
      "kind": "unknown"
    },
    {
      "mpn": "CD4001BF3A",
      "kind": "unknown"
    },
    {
      "mpn": "CD4001BF3A.A",
      "kind": "unknown"
    },
    {
      "mpn": "CD4001BM",
      "kind": "unknown"
    },
    {
      "mpn": "CD4001BM.A",
      "kind": "unknown"
    },
    {
      "mpn": "CD4001BM96",
      "kind": "unknown"
    },
    {
      "mpn": "CD4001BM96.A",
      "kind": "unknown"
    },
    {
      "mpn": "CD4001BM96E4",
      "kind": "unknown"
    },
    {
      "mpn": "CD4001BM96G4",
      "kind": "unknown"
    },
    {
      "mpn": "CD4001BMT",
      "kind": "unknown"
    },
    {
      "mpn": "CD4001BNSR",
      "kind": "unknown"
    },
    {
      "mpn": "CD4001BNSRG4",
      "kind": "unknown"
    },
    {
      "mpn": "CD4001BPW",
      "kind": "unknown"
    },
    {
      "mpn": "CD4001BPWR",
      "kind": "unknown"
    },
    {
      "mpn": "CD4001BPWR.A",
      "kind": "unknown"
    },
    {
      "mpn": "CD4001BPWRG4",
      "kind": "unknown"
    }
  ]
}