CBM708RAS8

{
  "schema_version": 1,
  "type": "component",
  "slug": "cbm708ras8",
  "title": "CBM708RAS8",
  "brief": "Corebai Microelectronics Supervisor and Reset ICs, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "pmic",
    "cbm708ras8"
  ],
  "component": {
    "mpn": "CBM708RAS8",
    "manufacturer": "Corebai Microelectronics",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "PMIC",
    "subcategory": "Supervisor and Reset ICs",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/174ababe909bb0700d21d4e356850df8.pdf",
    "parts": {
      "symbol": "cbm708ras8.kicad_sym",
      "footprint": "cbm708ras8.kicad_mod",
      "model_3d": "cbm708ras8-etched.glb",
      "model_3d_plain": "cbm708ras8.glb",
      "model_3d_step": "cbm708ras8-etched.step",
      "model_3d_step_plain": "cbm708ras8.step",
      "lbr": "cbm708ras8.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "MR",
        "type": "input",
        "description": "Manual Reset Input (active low, overline MR). Taking this pin below 0.6 V generates a RESET/RESET pulse. Internally debounced with a 70 µA pull-up (25-250 µA), so the pin may be left floating or driven by a switch, TTL, or CMOS logic."
      },
      {
        "number": "2",
        "name": "VCC",
        "type": "power_in",
        "description": "Power Supply Input. Operating range 2.70-5.5 V for the 708R variant (absolute max −0.3 to +6 V). Place a 0.1 µF decoupling capacitor between VCC and GND. Quiescent supply current ~100 µA typ."
      },
      {
        "number": "3",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference for all signals (0 V)."
      },
      {
        "number": "4",
        "name": "PFI",
        "type": "input",
        "description": "Power-Fail Input. Noninverting input to the internal 1.25 V power-fail comparator. When PFI drops below 1.25 V (typ), PFO goes low. Input current ±25 nA max. If unused, tie PFI to GND."
      },
      {
        "number": "5",
        "name": "PFO",
        "type": "output",
        "description": "Power-Fail Output (active low, overline PFO). Open push-pull output from the 1.25 V comparator; goes low whenever PFI < 1.25 V. VOH ≥ 0.8×VCC (ISOURCE = 500 µA), VOL ≤ 0.3 V (ISINK = 1.2 mA)."
      },
      {
        "number": "6",
        "name": "NC",
        "type": "unconnected",
        "description": "No Connect. Not internally bonded; leave floating or tie to GND. (Replaces the WDI watchdog input found on the CBM706x parts.)"
      },
      {
        "number": "7",
        "name": "RESET",
        "type": "output",
        "description": "Active-low Reset Output (overline RESET). Asserts low for 200 ms (typ) whenever VCC drops below the 2.63 V reset threshold or MR is pulled low; remains low until 200 ms after VCC recovers and MR is released. Guaranteed valid with VCC as low as 1 V. VOH ≥ 0.8×VCC @ ISOURCE = 500 µA; VOL ≤ 0.3 V @ ISINK = 500 µA."
      },
      {
        "number": "8",
        "name": "RESET",
        "type": "output",
        "description": "Active-high Reset Output (non-inverted). Logical inverse of pin 7's RESET, suitable for systems needing an active-high reset. Same drive levels as the active-low RESET output."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/174ababe909bb0700d21d4e356850df8.pdf",
        "pages": 19,
        "sha256": "c45131be953a4993",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
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        "file": "cbm708ras8.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          4.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cbm708ras8-etched.step",
        "role": "eda",
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        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "1280813e68376037f2caf692c016483239cd4b16c4ba2a53333b2f00f6a49afb",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Corebai Microelectronics",
      "Package": "SOIC-8",
      "Category": "PMIC",
      "Pins": "8"
    }
  },
  "variants": [
    {
      "mpn": "CBM708RAS8",
      "kind": "packaging"
    }
  ],
  "sections": [
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    "viewers",
    "readme",
    "breadcrumbs",
    "info"
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  "discovery_triggers": [
    "cbm708ras8"
  ],
  "discovery_pitch": "CBM708RAS8 (Corebai Microelectronics) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
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    "cbm708ras8.kicad_sym",
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    "cbm708ras8.step",
    "cbm708ras8.lbr",
    "docs/hero.png",
    "docs/cbm708ras8-datasheet.pdf",
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  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-24T18:29:33.226Z"
}