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CBM706SAS8

Corebai Microelectronics · Supervisor And Reset ICs · SOIC-8

CBM706SAS8 from Corebai Microelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	MR	input	Active-low manual reset input that generates a reset when taken below 0.6 V, can be driven from TTL/CMOS logic or a manual switch, and has an internal 70 µA pull-up that holds it high when floating.
2	VCC	power_in	Power supply input; place a 0.1 µF decoupling capacitor between VCC and GND.
3	GND	power_in	Ground reference for all signals (0 V).
4	PFI	input	Noninverting input to the power fail comparator; PFO goes low when PFI is below 1.25 V, and PFI connects to GND if unused.
5	PFO	output	Active-low power fail comparator output that goes low when PFI is less than 1.25 V.
6	WDI	input	Watchdog input; WDO goes low if WDI stays high or low longer than the watchdog timeout period (1.6 s typ), and any transition on WDI clears the timer.
7	RESET	output	Active-low logic reset output that is asserted for 200 ms when VCC falls below the reset threshold (2.93 V typ for the S version) or MR is low, and stays low for 200 ms after VCC rises above the threshold or MR goes high.
8	WDO	output	Active-low watchdog output that goes low if the watchdog timer times out from WDI inactivity, remains low whenever VCC is below the reset threshold, and goes high immediately once VCC rises above it.

Key specifications

Parameter	Value
Manufacturer	Corebai Microelectronics
Package	SOIC-8
Category	Power Management (PMIC)
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
VCC Operating Voltage Range	VCC	1		5.5	V		3
Supply Current			100	200	μA	VCC < 3.6 V	3
Supply Current				150	μA	VCC < 5.5 V	3
Reset Threshold	VRST	2.85	2.93	3	V	CBM706S/CBM708S	3
Reset Pulse Width		160	200	280	ms	VCC=3 V, VCC=3.3 V, VCC=5.0 V sub-rows as printed (S-variant mapping not stated)	3
Reset Output VOL	VOL			0.3	V	VRST(max)<VCC<3.6V, ISINK = 1.2mA	3
Reset Output VOL	VOL			0.4	V	4.5V<VCC<5.5V, ISINK = 3.2 mA	3
Watchdog Timeout Period		1	1.6	2.25	sec	CBM706S/CBM706T: VCC=3.3V; VIL=0.4V, VIH=VCC×0.8 V	3
WDI Pulse Width		100			ns	VRST(max)<VCC<3.6 V	3
WDI Pulse Width		50			ns	4.5V<VCC<5.5 V	3
WDI Input Threshold VIL	VIL			0.6	V	VRST(max)<VCC<3.6V	4
WDI Input Threshold VIL	VIL			0.8	V	VCC=5.0V	4
WDI Input Threshold VIH	VIH	3.5			V	VCC=5.0V	4
WDI Input Current		-1	0.02	1	μA	WDI=0V or VCC	4
WDO Output VOL	VOL			0.3	V	VRST(max)<VCC<3.6V, ISINK=500μA	4
WDO Output VOL	VOL			0.6	V	4.5V<VCC<5.5V, ISINK=1.2mA	4
MR Pull-Up Current		25	70	250	μA	MR=0V, VRST(max)<VCC<3.6V	4
MR Pull-Up Current		100	250	600	μA	MR=0V, 4.5V<VCC<5.5V	4
MR Pulse Width		500			ns	VRST(max)<VCC<3.6V	4
MR Pulse Width		150			ns	4.5V<VCC<5.5V	4
MR Input Threshold VIL	VIL			0.6	V	VRST(max)<VCC<3.6V	4
MR Input Threshold VIL	VIL			0.8	V	4.5V<VCC<5.5V	4
MR Input Threshold VIH	VIH	2			V	4.5V<VCC<5.5V	4
MR to RESET Output Delay				750	ns	VRST(max)<VCC<3.6V	4
MR to RESET Output Delay				250	ns	4.5V<VCC<5.5V	4
PFI Input Threshold		1.2	1.25	1.3	V	CBM706S/CBM708S/CBM706T/CBM708T, VCC=3.3V, PFI falling	4
PFI Input Current		-25	0.01	25	nA		4
PFO Output VOL	VOL			0.3	V	VRST(max)<VCC<3.6V, ISINK=1.2mA	4
PFO Output VOL	VOL			0.4	V	4.5V<VCC<5.5V, ISINK=3.2mA	4
Specified VCC Range (CBM70XS)	VCC	3		5.5	V	CBM706S/CBM708S specification range; TA = TMIN to TMAX	3
VCC Supply Voltage (absolute)	VCC	-0.3		6	V		5
Input Voltage, All Other Inputs (lower limit)		-0.3			V	Upper limit printed as VCC+0.3V	5
Input Current, VCC pin				20	mA		5
Input Current, GND pin				20	mA		5
Digital Output Current				20	mA		5
Power Dissipation, R-8 SOIC				470	mW	R-8 SOIC package	5
Operating Temperature Range (Industrial, Version A)		-40		85	°C	Industrial (Version A)	5
Lead Temperature (Soldering, 10 sec)				300	°C	10 sec	5
Lead Temperature, Vapor Phase				215	°C	Vapor phase, 60 sec	5
Lead Temperature, Infrared				220	°C	Infrared, 15 sec	5
Storage Temperature Range		-65		150	°C		5
ESD Rating		4.5			kV	Printed as >4.5kV	5
Thermal Impedance θJA, R-8 SOIC	θJA		110		°C/W	R-8 SOIC package	5

CAD (KiCad official)

Symbol: CBM706SAS8
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: cbm706sas8-etched.step / cbm706sas8-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cbm706sas8.step / cbm706sas8.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Corebai Microelectronics datasheet (22 pp, sha256 abb1ef59349c0eb3, retrieved 2026-10-17, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF