component

CAV24C32YE-GT3

Public Made by Adom

by adom

onsemi EEPROM, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentmemorycav24c32ye-gt3factory-2.0.0extractor-text

Verified CAV24C32YE-GT3

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: CAV24C32YE-GT3 · TSSOP-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 15-page datasheet
  • ✓distributor: lcsc C605353, digikey CAV24C32YE-GT3OSTR-ND, mouser 863-CAV24C32YE-GT3
  • ✓family: TSSOP-8_4.4x3mm_P0.65mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-ts3u9ivx/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.10)
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ cav24c32ye-gt3.kicad_sym✓ cav24c32ye-gt3.kicad_mod✓ cav24c32ye-gt3.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray
viewers cav24c32ye-gt3: viewers · Ray
cav24c32ye-gt3-etched.glb Publish 0.1.0 · Ray
cav24c32ye-gt3-etched.step cav24c32ye-gt3: factory component page (tier=mfr) · Ray
cav24c32ye-gt3-hero.glb cav24c32ye-gt3: hero GLB from the etched model (keeps the MPN mark) · Ray
cav24c32ye-gt3-hero.overlay.json Publish 0.1.0 · Ray
cav24c32ye-gt3.glb Publish 0.1.0 · Ray
cav24c32ye-gt3.kicad_mod Publish 0.1.0 · Ray
cav24c32ye-gt3.kicad_sym Publish 0.1.0 · Ray
cav24c32ye-gt3.lbr Publish 0.1.0 · Ray
cav24c32ye-gt3.step Publish 0.1.0 · Ray
package.json Publish 0.1.0 · Ray
page.json Set visibility: public · Ray
README.md Publish 0.1.0 · Ray
verification.json Verified: Published by the parts factory: tier mfr, 8 pins · Ray

CAV24C32YE-GT3

onsemi · EEPROM · TSSOP-8

CAV24C32YE-GT3 from onsemi, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Device address input that must match the slave address bit A0; hard-wired HIGH or LOW and pulled LOW internally when left floating.
2 A1 input Device address input that must match the slave address bit A1; hard-wired HIGH or LOW and pulled LOW internally when left floating.
3 A2 input Device address input that must match the slave address bit A2; hard-wired HIGH or LOW and pulled LOW internally when left floating.
4 VSS power_in Ground.
5 SDA bidirectional Serial data input/output that is open drain when transmitting, with data acquired on the positive edge and delivered on the negative edge of SCL.
6 SCL input Serial clock input that accepts the clock signal generated by the master.
7 WP input Write protect input that inhibits all write operations when pulled HIGH and is pulled LOW internally when left floating.
8 VCC power_in Power supply, 2.5 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer onsemi
Package TSSOP-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Storage Temperature -65 150 °C 2
Voltage on any Pin with Respect to Ground -0.5 6.5 V 2
Supply Voltage VCC 2.5 5.5 V 2
Operating Temperature TA -40 125 °C 2
Endurance NEND 1e+06 Program/Erase Cycles Page Mode, VCC = 5 V, 25°C (Note 3) 2
Data Retention TDR 100 Years 2
Read Current ICCR 1 mA Read, fSCL = 400 kHz 2
Write Current ICCW 2 mA Write, fSCL = 400 kHz 2
Standby Current ISB 5 µA All I/O Pins at GND or VCC; TA = −40°C to +125°C 2
I/O Pin Leakage IL 2 µA Pin at GND or VCC 2
Input Low Voltage VIL -0.5 V 2
Input Low Voltage VIL 0.3 x VCC 2
Input High Voltage VIH 0.7 x VCC A0, A1, A2 and WP 2
Input High Voltage VIH 5.5 V SCL and SDA 2
Output Low Voltage VOL 0.4 V VCC > 2.5 V, IOL = 3 mA 2
SDA I/O Pin Capacitance CIN 8 pF VIN = 0 V, TA = 25°C, VCC = 5.0 V 3
Input Capacitance (other pins) CIN 6 pF VIN = 0 V, TA = 25°C, VCC = 5.0 V 3
WP Input Current IWP 130 µA VIN < VIH, VCC = 5.5 V 3
WP Input Current IWP 120 µA VIN < VIH, VCC = 3.3 V 3
WP Input Current IWP 80 µA VIN < VIH, VCC = 2.5 V 3
WP Input Current IWP 2 µA VIN < VIH 3
Address Input Current (A0, A1, A2) IA 50 µA VIN < VIH, VCC = 5.5 V 3
Address Input Current (A0, A1, A2) IA 35 µA VIN < VIH, VCC = 3.3 V 3
Address Input Current (A0, A1, A2) IA 25 µA VIN < VIH, VCC = 2.5 V 3
Address Input Current (A0, A1, A2) IA 2 µA VIN > VIH 3
Clock Frequency FSCL 100 kHz Standard mode 3
Clock Frequency FSCL 400 kHz Fast mode 3
START Condition Hold Time tHD:STA 4 µs Standard mode 3
START Condition Hold Time tHD:STA 0.6 µs Fast mode 3
Low Period of SCL Clock tLOW 4.7 µs Standard mode 3
Low Period of SCL Clock tLOW 1.3 µs Fast mode 3
High Period of SCL Clock tHIGH 4 µs Standard mode 3
High Period of SCL Clock tHIGH 0.6 µs Fast mode 3
START Condition Setup Time tSU:STA 4.7 µs Standard mode 3
START Condition Setup Time tSU:STA 0.6 µs Fast mode 3
Data In Hold Time tHD:DAT 0 µs Standard and Fast mode 3
Data In Setup Time tSU:DAT 250 ns Standard mode 3
Data In Setup Time tSU:DAT 100 ns Fast mode 3
SDA and SCL Rise Time tR 1000 ns Standard mode 3
SDA and SCL Rise Time tR 300 ns Fast mode 3
SDA and SCL Fall Time tF 300 ns Standard and Fast mode 3
STOP Condition Setup Time tSU:STO 4 µs Standard mode 3
STOP Condition Setup Time tSU:STO 0.6 µs Fast mode 3
Bus Free Time Between STOP and START tBUF 4.7 µs Standard mode 3
Bus Free Time Between STOP and START tBUF 1.3 µs Fast mode 3
SCL Low to Data Out Valid tAA 3.5 µs Standard mode 3
SCL Low to Data Out Valid tAA 0.9 µs Fast mode 3
Data Out Hold Time tDH 100 ns Standard and Fast mode 3
Noise Pulse Filtered at SCL and SDA Inputs Ti 100 ns Standard and Fast mode 3
WP Setup Time tSU:WP 0 µs Standard and Fast mode 3
WP Hold Time tHD:WP 2.5 µs Standard and Fast mode 3
Write Cycle Time tWR 5 ms Standard and Fast mode 3
Power-up to Ready Mode tPU 1 ms Standard and Fast mode 3

CAD (KiCad official)

  • Symbol: CAV24C32YE-GT3
  • Footprint: Package_SO:TSSOP-8_4.4x3mm_P0.65mm
  • 3D model: TSSOP-8 (KiCad packages3D, STEP)
  • 3D model files: cav24c32ye-gt3-etched.step / cav24c32ye-gt3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cav24c32ye-gt3.step / cav24c32ye-gt3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (15 pp, sha256 4145e0c551c1fe57, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF