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Ray Publish 0.1.0 35f29ae 13d ago
{
  "slug": "ca-is3761lw",
  "version": "0.1.0",
  "type": "component",
  "description": "Chipanalog Digital Isolators, SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "signal isolation devices",
    "ca-is3761lw",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ca-is3761lw.kicad_sym",
    "ca-is3761lw.kicad_mod",
    "ca-is3761lw.glb",
    "ca-is3761lw.step",
    "ca-is3761lw.lbr",
    "docs/hero.png",
    "docs/ca-is3761lw-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ca-is3761lw-hero.glb",
    "ca-is3761lw-hero.overlay.json",
    "ca-is3761lw-etched.glb"
  ],
  "component": {
    "mpn": "CA-IS3761LW",
    "manufacturer": "Chipanalog",
    "package": "SOIC-16-300mil",
    "pin_count": 16,
    "category": "Signal Isolation Devices",
    "subcategory": "Digital Isolators",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588907910072586240",
    "parts": {
      "symbol": "ca-is3761lw.kicad_sym",
      "footprint": "ca-is3761lw.kicad_mod",
      "model_3d": "ca-is3761lw-hero.glb",
      "model_3d_plain": "ca-is3761lw-etched.glb",
      "model_3d_step": "ca-is3761lw-etched.step",
      "model_3d_step_plain": "ca-is3761lw.step",
      "lbr": "ca-is3761lw.lbr"
    },
    "distributor_links": {
      "lcsc": "C528659"
    },
    "distributor_check": {
      "checked_at": "2026-10-17T20:58:04Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VDDA",
        "type": "power_in",
        "description": "Side-A supply voltage, recommended 2.375 V to 5.5 V, with absolute maximum 6.0 V relative to GNDA; place a 0.1 µF to 1 µF bypass capacitor within 2 mm of the pin."
      },
      {
        "number": "2",
        "name": "VI1",
        "type": "input",
        "description": "Side-A logic input for forward channel 1, Schmitt-trigger input compatible with CMOS and TTL levels (VIH 2.0 V min, VIL 0.8 V max at 5 V)."
      },
      {
        "number": "3",
        "name": "VI2",
        "type": "input",
        "description": "Side-A logic input for forward channel 2, Schmitt-trigger input compatible with CMOS and TTL levels (VIH 2.0 V min, VIL 0.8 V max at 5 V)."
      },
      {
        "number": "4",
        "name": "VI3",
        "type": "input",
        "description": "Side-A logic input for forward channel 3, Schmitt-trigger input compatible with CMOS and TTL levels (VIH 2.0 V min, VIL 0.8 V max at 5 V)."
      },
      {
        "number": "5",
        "name": "VI4",
        "type": "input",
        "description": "Side-A logic input for forward channel 4 on the CA-IS3761 (pin is an output on CA-IS3763), Schmitt-trigger input with about 2 pF input capacitance and leakage limited to ±4 µA."
      },
      {
        "number": "6",
        "name": "VI5",
        "type": "input",
        "description": "Side-A logic input for forward channel 5 on the CA-IS3761 (pin is an output on CA-IS3762/63), Schmitt-trigger input with leakage limited to ±4 µA."
      },
      {
        "number": "7",
        "name": "VO6",
        "type": "output",
        "description": "Side-A logic output for reverse channel 6 on the CA-IS3761, a rail-to-rail output with about 50 Ω output impedance and ±4 mA drive at 5 V supply."
      },
      {
        "number": "8",
        "name": "GNDA",
        "type": "power_in",
        "description": "Side-A ground reference for the isolator's A-side circuits; all A-side voltages are referenced to this pin."
      },
      {
        "number": "9",
        "name": "GNDB",
        "type": "power_in",
        "description": "Side-B ground reference for the isolator's B-side circuits; all B-side voltages are referenced to this pin."
      },
      {
        "number": "10",
        "name": "VI6",
        "type": "input",
        "description": "Side-B logic input for reverse channel 6 on the CA-IS3761, Schmitt-trigger input with leakage limited to ±4 µA."
      },
      {
        "number": "11",
        "name": "VO5",
        "type": "output",
        "description": "Side-B logic output for forward channel 5 on the CA-IS3761, a rail-to-rail output with about 50 Ω output impedance and ±4 mA drive at 5 V supply."
      },
      {
        "number": "12",
        "name": "VO4",
        "type": "output",
        "description": "Side-B logic output for forward channel 4 on the CA-IS3761, a rail-to-rail output with about 50 Ω output impedance and ±4 mA drive at 5 V supply."
      },
      {
        "number": "13",
        "name": "VO3",
        "type": "output",
        "description": "Side-B logic output for forward channel 3, a rail-to-rail output with about 50 Ω output impedance and ±4 mA drive at 5 V supply."
      },
      {
        "number": "14",
        "name": "VO2",
        "type": "output",
        "description": "Side-B logic output for forward channel 2, a rail-to-rail output with about 50 Ω output impedance and ±4 mA drive at 5 V supply."
      },
      {
        "number": "15",
        "name": "VO1",
        "type": "output",
        "description": "Side-B logic output for forward channel 1, a rail-to-rail output with about 50 Ω output impedance and ±4 mA drive at 5 V supply."
      },
      {
        "number": "16",
        "name": "VDDB",
        "type": "power_in",
        "description": "Side-B supply voltage, recommended 2.375 V to 5.5 V, with absolute maximum 6.0 V relative to GNDB; place a 0.1 µF to 1 µF bypass capacitor within 2 mm of the pin."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin-to-function mapping for CA-IS3761 was taken from the variant-specific columns of Table 5-1 (page; Pins 5, 6, 7, 10, 11 and 12 are shared across variants with different direction per variant. The CA-; The datasheet does not use the term 'SOIC-16-300mil'. The W (SOIC16-WB) package is the wide body var"
        ],
        "pages_sent": 22,
        "cost_usd": 0.1172,
        "at": "2026-10-17T20:55:30"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588907910072586240",
        "pages": 22,
        "sha256": "adf22151c4806ef6",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ca-is3761lw.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-17",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ca-is3761lw-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "f8114dc9ba63b2f8ae473bfb68bc42959609b5bc1af454db437badcd4f60c3e1",
        "checked": "2026-10-17",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}