component
CA-IS3742LB
Public Made by Adomby adom
Chipanalog Digital Isolators, SSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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"source": "Component Ocean /api/assign-pns",
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"number": "1",
"name": "VDDA",
"type": "power_in",
"description": "A-side supply voltage, recommended 2.375 V to 5.5 V (absolute maximum 7.0 V); bypass to GNDA with a 0.1 µF to 1 µF capacitor placed close to the pin."
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{
"number": "2",
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"description": "A-side ground reference; all A-side signals are referenced to this pin."
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{
"number": "3",
"name": "VI1",
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"description": "A-side logic input for forward channel 1, Schmitt-trigger input with TTL-compatible thresholds (VIH min 2.0 V, VIL max 0.8 V)."
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{
"number": "4",
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"description": "A-side logic input for forward channel 2, Schmitt-trigger input with TTL-compatible thresholds (VIH min 2.0 V, VIL max 0.8 V)."
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{
"number": "5",
"name": "VO3",
"type": "output",
"description": "A-side logic output of channel A3 (CA-IS3742); enabled by ENA and goes high-impedance when ENA is low."
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{
"number": "6",
"name": "VO4",
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"description": "A-side logic output of channel A4 (CA-IS3742); enabled by ENA and goes high-impedance when ENA is low."
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{
"number": "7",
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"description": "A-side active-high output enable with internal pull-up to local VDD; drive it to an external logic level in noisy environments rather than leaving it floating with traces attached."
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{
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{
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{
"number": "10",
"name": "ENB",
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"description": "B-side active-high output enable with internal pull-up to local VDD; when low, outputs B1 and B2 go high-impedance."
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{
"number": "11",
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"description": "B-side logic input for reverse channel 4 (CA-IS3742), Schmitt-trigger input with TTL-compatible thresholds."
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{
"number": "12",
"name": "VI3",
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"description": "B-side logic input for reverse channel 3 (CA-IS3742), Schmitt-trigger input with TTL-compatible thresholds."
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{
"number": "13",
"name": "VO2",
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"description": "B-side logic output of channel B2; enabled by ENB and high-impedance when ENB is low."
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{
"number": "14",
"name": "VO1",
"type": "output",
"description": "B-side logic output of channel B1; enabled by ENB and high-impedance when ENB is low."
},
{
"number": "15",
"name": "GNDB",
"type": "power_in",
"description": "B-side ground reference, internally tied to pin 9 GNDB."
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{
"number": "16",
"name": "VDDB",
"type": "power_in",
"description": "B-side supply voltage, recommended 2.375 V to 5.5 V (absolute maximum 7.0 V); bypass to GNDB with a 0.1 µF to 1 µF capacitor placed close to the pin."
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"Package": "SSOP-16",
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"name": "Supply voltage VDDA, VDDB",
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"name": "Input threshold logic low",
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{
"name": "Signal data rate",
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{
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"name": "Input threshold logic high (5 V)",
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"name": "Input threshold logic low (5 V)",
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{
"name": "Output impedance tolerance (5 V; note 2: 50 Ω ±40%)",
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{
"name": "Logic low output voltage (3.3 V)",
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"name": "Input threshold logic high (3.3 V)",
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"name": "Input threshold logic low (3.3 V)",
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"name": "Input high-level leakage current (3.3 V)",
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"name": "Input low-level leakage current (3.3 V)",
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{
"name": "Output impedance tolerance (3.3 V; note 2: 50 Ω ±40%)",
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"name": "Common-mode transient immunity (3.3 V)",
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{
"name": "Logic low output voltage (2.5 V)",
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"name": "Input threshold logic high (2.5 V)",
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