component
CA-IF4805HS
Public Made by Adomby adom
Chipanalog RS-485 / RS-422 ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"schema_version": 1,
"type": "component",
"slug": "ca-if4805hs",
"title": "CA-IF4805HS",
"brief": "Chipanalog RS-485 / RS-422 ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"interface",
"ca-if4805hs",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "CA-IF4805HS",
"manufacturer": "Chipanalog",
"package": "SOIC-8",
"pin_count": 8,
"category": "Interface",
"subcategory": "RS-485 / RS-422 ICs",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589834852314226688",
"parts": {
"symbol": "ca-if4805hs.kicad_sym",
"footprint": "ca-if4805hs.kicad_mod",
"model_3d": "ca-if4805hs-hero.glb",
"model_3d_plain": "ca-if4805hs.glb",
"model_3d_step": "ca-if4805hs-etched.step",
"model_3d_step_plain": "ca-if4805hs.step",
"lbr": "ca-if4805hs.lbr"
},
"distributor_links": {
"lcsc": "C2890054"
},
"distributor_check": {
"checked_at": "2026-10-10T01:01:44Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "no match"
},
"mouser": {
"pn": null,
"status": "no match"
}
},
"pins": [
{
"number": "1",
"name": "RO",
"type": "output",
"description": "Receiver output: goes high when VID = VA − VB exceeds VTH+ and low when VID falls below VTH−, and is high-impedance when REB is high or open."
},
{
"number": "2",
"name": "REB",
"type": "input",
"description": "Receiver enable, active low: the receiver is enabled when REB is low and its output is high-impedance when REB is high or open."
},
{
"number": "3",
"name": "DE",
"type": "input",
"description": "Driver enable, active high: the driver outputs follow DI when DE is high and are high-impedance when DE is low; an internal pull-down disables the driver when DE is open."
},
{
"number": "4",
"name": "DI",
"type": "input",
"description": "Driver data input: drives Y high and Z low when high (and the reverse when low), with an internal pull-up to VCC so the driver outputs A high and B low if left open while enabled."
},
{
"number": "5",
"name": "GND",
"type": "power_in",
"description": "Ground reference for the device."
},
{
"number": "6",
"name": "A",
"type": "bidirectional",
"description": "Bus port A, driver/receiver non-inverting output/input; tolerates bus common-mode range of ±15 V and fault voltage of ±30 V, with ±30 kV HBM ESD on this half-duplex (HS) part."
},
{
"number": "7",
"name": "B",
"type": "bidirectional",
"description": "Bus port B, driver/receiver inverting output/input; tolerates bus common-mode range of ±15 V and fault voltage of ±30 V, with ±30 kV HBM ESD on this half-duplex (HS) part."
},
{
"number": "8",
"name": "VCC",
"type": "power_in",
"description": "Power supply; the recommended supply range is 3 V to 5.5 V and the absolute maximum is 7.0 V."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The MPN CA-IF4805HS is the half-duplex SOIC8 variant (ordering table, page 2). Pin numbers and funct; A and B are typed bidirectional because the datasheet describes them as both driver/receiver outputs; The VCC and ESD limits in the descriptions come from pages 6 and 15 rather than page 4 (page 4 only "
],
"pages_sent": 21,
"cost_usd": 0.0694,
"at": "2026-10-10T00:59:35"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589834852314226688",
"pages": 21,
"sha256": "c063fe96e2b8699c",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "ca-if4805hs.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
4.9,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
"checked": "2026-10-10",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ca-if4805hs-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
4.9,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "bf60b6b3e1399b61127ad38f2fe5a17b7d814af8750f365a2d2a9f822460a0f3",
"checked": "2026-10-10",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Chipanalog",
"Package": "SOIC-8",
"Category": "Interface",
"Pins": "8"
}
},
"variants": [],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"ca-if4805hs"
],
"discovery_pitch": "CA-IF4805HS (Chipanalog) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"ca-if4805hs.kicad_sym",
"ca-if4805hs.kicad_mod",
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"ca-if4805hs.step",
"ca-if4805hs.lbr",
"docs/hero.png",
"docs/ca-if4805hs-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"ca-if4805hs-hero.glb",
"ca-if4805hs-hero.overlay.json"
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"visibility": {
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}
}