component
C8051F912-D-GM
Public Made by Adomby adom
SKYWORKS/SILICON LABS Microcontroller Units (MCUs/MPUs/SOCs), QFN-24(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
Ray
Publish 0.1.0
8529d57
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{
"slug": "c8051f912-d-gm",
"version": "0.1.0",
"type": "component",
"description": "SKYWORKS/SILICON LABS Microcontroller Units (MCUs/MPUs/SOCs), QFN-24(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"single chip microcomputer-microcontroller",
"c8051f912-d-gm",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"c8051f912-d-gm.kicad_sym",
"c8051f912-d-gm.kicad_mod",
"c8051f912-d-gm.glb",
"c8051f912-d-gm.step",
"c8051f912-d-gm.lbr",
"docs/hero.png",
"docs/c8051f912-d-gm-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"c8051f912-d-gm-hero.glb",
"c8051f912-d-gm-hero.overlay.json",
"c8051f912-d-gm-etched.glb"
],
"component": {
"mpn": "C8051F912-D-GM",
"manufacturer": "SKYWORKS/SILICON LABS",
"package": "QFN-24(4x4)",
"pin_count": 25,
"category": "Single Chip Microcomputer/Microcontroller",
"subcategory": "Microcontroller Units (MCUs/MPUs/SOCs)",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/aab3d80c13216ec87d65f3effe41387a.pdf",
"parts": {
"symbol": "c8051f912-d-gm.kicad_sym",
"footprint": "c8051f912-d-gm.kicad_mod",
"model_3d": "c8051f912-d-gm-hero.glb",
"model_3d_plain": "c8051f912-d-gm-etched.glb",
"model_3d_step": "c8051f912-d-gm-etched.step",
"model_3d_step_plain": "c8051f912-d-gm.step",
"lbr": "c8051f912-d-gm.lbr"
},
"distributor_links": {
"lcsc": "C5963463",
"digikey": "C8051F912-D-GM-ND",
"mouser": "634-C8051F912-D-GM"
},
"distributor_check": {
"checked_at": "2026-10-31T01:30:37Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "C8051F912-D-GM-ND",
"status": "found",
"lifecycle": "Obsolete"
},
"mouser": {
"pn": "634-C8051F912-D-GM",
"status": "found",
"lifecycle": "Obsolete"
}
},
"pins": [
{
"number": "1",
"name": "DC-/GND",
"type": "power_in",
"description": "DC-DC converter return current path, typically not connected to ground in single-cell battery mode and must be connected directly to ground in dual-cell battery mode."
},
{
"number": "2",
"name": "GND",
"type": "power_in",
"description": "Required ground connection."
},
{
"number": "3",
"name": "VDD/DC+",
"type": "power_in",
"description": "Power supply voltage that must be 1.8 to 3.6 V and always be greater than VBAT; in single-cell mode this pin is the positive dc-dc converter output and needs a 1 uF ceramic capacitor between DC+ and DC- (it can supply external devices in single-cell mode)."
},
{
"number": "4",
"name": "DCEN",
"type": "power_in",
"description": "DC-DC enable pin: in single-cell battery mode it must be connected to VBAT through a 0.68 uH inductor, and in dual-cell battery mode it must be connected directly to ground."
},
{
"number": "5",
"name": "VBAT",
"type": "power_in",
"description": "Battery supply voltage: must be 0.9 to 1.8 V in single-cell and 1.8 to 3.6 V in dual-cell mode on C8051F911/01, and 0.9 to 3.6 V in single-cell and 1.8 to 3.6 V in dual-cell mode on C8051F912/02."
},
{
"number": "6",
"name": "RST/C2CK",
"type": "bidirectional",
"description": "Open-drain reset output from the internal POR or VDD monitor that an external source can drive low for at least 15 us to reset the device, with a 1 k to 5 k pullup to VDD recommended; the same pin is the C2 debug interface clock."
},
{
"number": "7",
"name": "P2.7/C2D",
"type": "bidirectional",
"description": "Port 2.7 GPIO only (the Crossbar cannot route to it and it cannot be an analog input), also serving as the C2 debug data signal; available only on C8051F912/02."
},
{
"number": "8",
"name": "XTAL4",
"type": "output",
"description": "SmaRTClock oscillator crystal output."
},
{
"number": "9",
"name": "XTAL3",
"type": "input",
"description": "SmaRTClock oscillator crystal input."
},
{
"number": "10",
"name": "P1.6",
"type": "bidirectional",
"description": "Port 1.6 GPIO pin (digital I/O or analog input per Port I/O configuration)."
},
{
"number": "11",
"name": "P1.5",
"type": "bidirectional",
"description": "Port 1.5 GPIO pin (digital I/O or analog input per Port I/O configuration)."
},
{
"number": "12",
"name": "P1.4",
"type": "bidirectional",
"description": "Port 1.4 GPIO pin (digital I/O or analog input per Port I/O configuration)."
},
{
"number": "13",
"name": "P1.3",
"type": "bidirectional",
"description": "Port 1.3 GPIO pin; may also be used as NSS for SPI1."
},
{
"number": "14",
"name": "P1.2",
"type": "bidirectional",
"description": "Port 1.2 GPIO pin; may also be used as MOSI for SPI1."
},
{
"number": "15",
"name": "P1.1",
"type": "bidirectional",
"description": "Port 1.1 GPIO pin; may also be used as MISO for SPI1."
},
{
"number": "16",
"name": "P1.0",
"type": "bidirectional",
"description": "Port 1.0 GPIO pin; may also be used as SCK for SPI1."
},
{
"number": "17",
"name": "P0.7/IREF0",
"type": "bidirectional",
"description": "Port 0.7 GPIO pin; alternatively the IREF0 current reference output."
},
{
"number": "18",
"name": "P0.6/CNVSTR",
"type": "bidirectional",
"description": "Port 0.6 GPIO pin; alternatively the external convert start input for ADC0."
},
{
"number": "19",
"name": "P0.5/RX",
"type": "bidirectional",
"description": "Port 0.5 GPIO pin; alternatively the UART RX input."
},
{
"number": "20",
"name": "P0.4/TX",
"type": "bidirectional",
"description": "Port 0.4 GPIO pin; alternatively the UART TX output."
},
{
"number": "21",
"name": "P0.3/XTAL2/WAKEOUT",
"type": "bidirectional",
"description": "Port 0.3 GPIO pin; alternatively the external oscillator excitation driver (XTAL2), an external clock input, or the WAKEOUT wake-up request signal (C8051F912/02 only)."
},
{
"number": "22",
"name": "P0.2/XTAL1/RTCOUT",
"type": "bidirectional",
"description": "Port 0.2 GPIO pin; alternatively the external oscillator return for a crystal or resonator (XTAL1), or the buffered SmaRTClock output RTCOUT (C8051F912/02 only)."
},
{
"number": "23",
"name": "P0.1/AGND",
"type": "bidirectional",
"description": "Port 0.1 GPIO pin; alternatively the optional analog ground reference AGND."
},
{
"number": "24",
"name": "P0.0/VREF",
"type": "bidirectional",
"description": "Port 0.0 GPIO pin; alternatively the external VREF input or the internal VREF output, with external VREF decoupling capacitors recommended."
},
{
"number": "25",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The MPN in the request is C8051F912-D-GM, which does not appear in the supplied datasheet text. The ; The datasheet does not number the optional GND shown in Figure 3.1 (labelled 'GND (Optional Connecti; Pins with more than one function (VDD/DC+, DC-/GND, DCEN, P0.x and XTAL/RST/C2 pins) are typed from ",
"exposed pad 25 added from the footprint"
],
"pages_sent": 38,
"cost_usd": 0.1984,
"at": "2026-10-31T01:29:38"
},
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/aab3d80c13216ec87d65f3effe41387a.pdf",
"pages": 318,
"sha256": "d9f48e8306647ff2",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 25,
"described": 25,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "c8051f912-d-gm.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
4.0,
4.0,
0.77
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "096fc110543e6d324c5120c2d38e3dca87a389da9b6fac234f1fe40856295ef4",
"checked": "2026-10-31",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "c8051f912-d-gm-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
4.0,
4.0,
0.77
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "7a8a794369e6a0a0d1ac58af75a18d617cbd9d291a39dfed8c8e03b92fb99f04",
"checked": "2026-10-31",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
],
"package_dims": {
"package_code": "QFN-24",
"source_page": 32,
"D": {
"nom_mm": 4.0,
"range_mm": [
null,
null
]
},
"E1": {
"nom_mm": 4.0,
"range_mm": [
null,
null
]
},
"e": {
"nom_mm": 0.5,
"range_mm": [
null,
null
]
},
"A": {
"nom_mm": 0.75,
"range_mm": [
0.7,
0.8
]
},
"source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
"model_check": {
"file": "c8051f912-d-gm.step",
"verdict": "PASS",
"reasons": [
"height within the datasheet's package drawing"
],
"by": "factory/package_fit.py"
}
}
}
}