C1812C124J1GACTU - KEMET

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  "file": "docs/figures/kemet-ds-p1-overview-ordering.png",
  "document": "KEMET, Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs), C0G Dielectric, 10 to 250 VDC (Commercial Grade), C1003_C0G, 2/20/2025 (22 pages)",
  "page": 1,
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  "caption": "p.1 overview (no change in capacitance with time and voltage, +/-30 ppm/C) and ordering information (C 1812 C 124 J 1 G A C TU)",
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 {
  "file": "docs/figures/kemet-ds-p2-benefits-packaging.png",
  "document": "KEMET, Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs), C0G Dielectric, 10 to 250 VDC (Commercial Grade), C1003_C0G, 2/20/2025 (22 pages)",
  "page": 2,
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  "caption": "p.2 packaging C-spec (TU = 7 inch reel, unmarked) and benefits (no capacitance change with applied rated DC voltage, no decay with time)",
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 },
 {
  "file": "docs/figures/kemet-ds-p3-dimensions.png",
  "document": "KEMET, Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs), C0G Dielectric, 10 to 250 VDC (Commercial Grade), C1003_C0G, 2/20/2025 (22 pages)",
  "page": 3,
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  "caption": "p.3 dimensions: 1812 L 4.50 +/-0.30, W 3.20 +/-0.30, B 0.60 +/-0.35, S 2.30 min (mm)",
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 },
 {
  "file": "docs/figures/kemet-ds-p4-electrical.png",
  "document": "KEMET, Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs), C0G Dielectric, 10 to 250 VDC (Commercial Grade), C1003_C0G, 2/20/2025 (22 pages)",
  "page": 4,
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  "caption": "p.4 electrical parameters: -55 to +125 C, +/-30 ppm/C, 0 % aging, DWV 250 %, DF 0.1 %, IR",
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 {
  "file": "docs/figures/kemet-ds-p8-waterfall-1812.png",
  "document": "KEMET, Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs), C0G Dielectric, 10 to 250 VDC (Commercial Grade), C1003_C0G, 2/20/2025 (22 pages)",
  "page": 8,
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  "caption": "p.8 Table 1B: 0.12 uF (124) in C1812C at 100 V (voltage code 1) has chip thickness code GH",
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 {
  "file": "docs/figures/kemet-ds-p10-thickness.png",
  "document": "KEMET, Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs), C0G Dielectric, 10 to 250 VDC (Commercial Grade), C1003_C0G, 2/20/2025 (22 pages)",
  "page": 10,
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  "caption": "p.10 Table 2A: thickness code GH = 1.40 +/-0.15 mm; 1,000 pcs per 7 inch plastic reel",
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 },
 {
  "file": "docs/figures/kemet-ds-p12-land-pattern.png",
  "document": "KEMET, Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs), C0G Dielectric, 10 to 250 VDC (Commercial Grade), C1003_C0G, 2/20/2025 (22 pages)",
  "page": 12,
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  "caption": "p.12 Table 3: IPC-7351 land pattern for 1812 at density levels A, B and C",
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 },
 {
  "file": "docs/figures/kemet-ds-p13-soldering.png",
  "document": "KEMET, Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs), C0G Dielectric, 10 to 250 VDC (Commercial Grade), C1003_C0G, 2/20/2025 (22 pages)",
  "page": 13,
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  "caption": "p.13 soldering: reflow only for 1812, profile for 100 % matte Sn (260 C peak)",
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 },
 {
  "file": "docs/figures/kemet-ds-p15-marking.png",
  "document": "KEMET, Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs), C0G Dielectric, 10 to 250 VDC (Commercial Grade), C1003_C0G, 2/20/2025 (22 pages)",
  "page": 15,
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  "caption": "p.15 construction and marking: C0G devices are supplied unmarked only",
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]