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John Lauer Component record for c1812c124j1gactu: files batch 1 363a69c 1d ago

C1812C124J1GACTU

KEMET C1812C124J1GACTU: MLCC 0.12 uF +/-5 %, 100 V, C0G/NP0, 1812 (4532 metric). A commercial grade, class I multilayer ceramic chip capacitor from KEMET's C0G series (KEMET is part of the YAGEO Group). C0G holds its capacitance against DC voltage, temperature and time, which makes it the choice for timing, tuning, filters, snubbers and other circuits where the value must not move.

Field Value
Manufacturer KEMET Electronics Corporation (YAGEO Group)
Manufacturer part number C1812C124J1GACTU
Type MLCC, Class 1 (C0G / NP0), commercial grade
Capacitance 0.12 uF (120 nF), +/-5 % (J)
Rated voltage 100 V DC
Dielectric C0G (NP0): 0 +/-30 ppm/C, -55 to +125 C
Package 1812 (4532 metric), 4.50 x 3.20 x 1.40 mm (thickness code GH)
Marking none (C0G parts are supplied unmarked)
Datasheet KEMET, Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs), C0G Dielectric, 10 to 250 VDC (Commercial Grade), C1003_C0G, 2/20/2025 (22 pages)

Why C0G: stable with voltage, temperature and time

The figures below are KEMET's, from the datasheet on this page:

  • Voltage. "No capacitance change with respect to applied rated DC voltage" (p.2; the overview on p.1 says C0G "exhibits no change in capacitance with respect to time and voltage"). At 100 V this part is still 0.12 uF.
  • Temperature. Capacitance change is limited to +/-30 ppm/C from -55 to +125 C, referenced to +25 C (p.1, p.4). Worked out from that limit: at most +/-0.3 % at +125 C and +/-0.24 % at -55 C.
  • Time. Aging rate 0 % per decade hour (p.4), "no capacitance decay with time" (p.2).
  • No piezoelectric noise, low ESR and ESL and high ripple current capability are listed as benefits (p.1).

By contrast, a class II X7R capacitor is allowed +/-15 % over -55 to +125 C (the EIA X7R definition), loses part of its capacitance under DC bias, and ages over time; at a 100 V rating that bias loss can be large. That is the reason to choose this C0G part over an X7R of the same value where the capacitance has to stay put: the cost is size, since 0.12 uF at 100 V needs an 1812 case in C0G.

Datasheet p.2: benefits and packaging codes

Datasheet p.4: electrical parameters

Key specifications

Parameter Value Datasheet page
Capacitance 0.12 uF (120 nF) +/-5 % (code 124, J) p.1 ordering information
Rated voltage 100 V DC (voltage code 1) p.1
Dielectric C0G (NP0), EIA Class I, temperature compensating p.1
Temperature coefficient 0 +/-30 ppm/C from -55 to +125 C, referenced to +25 C and 0 V DC p.1, p.4
Voltage coefficient no capacitance change with applied rated DC voltage p.1, p.2
Aging 0 % (maximum capacitance loss per decade hour); no capacitance decay with time p.2, p.4
Dissipation factor 0.1 % max at 25 C (1 kHz, 1.0 Vrms for parts above 1,000 pF) p.4
Insulation resistance 1,000 MOhm x uF or 100 GOhm, whichever is lower: about 8.3 GOhm min for 0.12 uF (100 V applied, 25 C) p.4
Dielectric withstanding voltage 250 % of rated voltage (250 V) for 5 +/-1 s, charge current up to 50 mA p.4
After life, humidity and moisture tests capacitance shift 0.3 % or +/-0.25 pF max, DF 0.5 % max, IR 10 % of initial limit p.4
Operating temperature -55 to +125 C p.4
Size L 4.50 +/-0.30, W 3.20 +/-0.30, T 1.40 +/-0.15 (thickness code GH), B 0.60 +/-0.35, S 2.30 min (mm) p.3, p.8, p.10
Termination 100 % matte tin over nickel barrier over copper (termination code C) p.1, p.15
Packaging (TU) 7 inch reel, unmarked; embossed plastic tape 12 mm wide, 8 mm pitch; 1,000 pieces per reel p.2, p.10, p.16
Soldering reflow only for 1812; matte Sn profile peaks at 260 C; up to three reflow passes p.3, p.13
Compliance lead (Pb) free, RoHS and REACH compliant without exemptions p.1, p.2
Marking none: C0G parts are supplied unmarked only p.2, p.15

Page numbers refer to KEMET C1003_C0G, 2/20/2025.

Ordering

Distributor Part number Stock seen 2026-10-21 Price seen
Mouser 80-C1812C124J1G 1,701 $2.98 (1), $1.79 (100), lead time 266 days
DigiKey 399-C1812C124J1GACTUTR-ND 1,761 $3.53 (1)
LCSC / JLCPCB not listed - -

Stock and prices are a snapshot from the Adom parts search on 2026-10-21; check the distributor before ordering. DigiKey lists the part as Active. JLCPCB/LCSC search for C1812C124J1GACTU returned no part on 2026-10-21.

Part number

C ceramic | 1812 case size | C standard series | 124 = 12 x 10^4 pF = 0.12 uF | J +/-5 % | 1 = 100 V | G = C0G | A failure rate not applicable | C 100 % matte Sn termination | TU 7 inch reel, unmarked (datasheet p.1 and p.2). The thickness is not in the part number: Table 1B (p.8) gives code GH for 0.12 uF at 100 V in 1812, and Table 2A (p.10) gives GH = 1.40 +/-0.15 mm.

Datasheet p.1: overview and ordering information

Manufacturer and resources

Resource Link
Product page https://yageogroup.com/en/us/capacitors/ceramic/mlccs-smd/C1812C124J1GACTU.html (the KEMET address https://www.kemet.com/en/us/capacitors/ceramic/mlccs-smd/C1812C124J1GACTU.html redirects there)
Datasheet C1003_C0G, 2/20/2025 PDF on this page (KEMET, YAGEO)
3D model (STEP) https://search.kemet.com/component-documentation/download/step/C1812C124J1GACTU.step (copy under vendor/)
KEMET K-SIM simulation (impedance, ESR, temperature rise) https://ksim3.kemet.com/capacitor-simulation?pn=C1812C124J1GACTU
Flexible termination version KEMET product bulletin C1062_C0G_FT-CAP_SMD (datasheet p.1 note 1)

Pins

Pin Function
1 terminal (non-polar)
2 terminal (non-polar)

A ceramic capacitor has no polarity: either terminal may face either way (datasheet p.2, "non-polar device").

Land pattern: KiCad footprint vs KEMET

Land pattern
    Land pattern    
The footprint is KiCad's standard `C_1812_4532Metric`, and this guide lays its pads over KEMET's recommended IPC-7351 land (datasheet p.12, density level B) at true scale. Land centres, length and gap are identical; KiCad's pads are 0.10 mm narrower (3.40 vs 3.50 mm) and have rounded corners. Use it to decide whether to keep the KiCad pads or widen them to KEMET's level B before layout.

The comparison, with KEMET's three density levels

3D model

The model is KEMET's own STEP for this part number, downloaded by plain HTTP from KEMET's component documentation service. KEMET's file (CCS_CCSTD_1812_L4.8W3.5T1.55B0.6) is Y-up with a corner at the origin; C1812C124J1GACTU.step is the same package solid moved by one rigid transform (rotate +90 degrees about X, then translate) so it is Z-up, seated on z = 0 and centred on the footprint origin, with its face colours copied over and its volume unchanged. KEMET's file also carries a "KEMET" logo as three 5 um thick solids on top of the ceramic, coloured only with SolidWorks' default lavender. The real part has no marking (KEMET supplies C0G parts unmarked only, p.15), so the board model leaves the logo out. The download itself is kept unchanged as vendor/C1812C124J1GACTU-kemet-original.step, and every step is recorded in provenance/C1812C124J1GACTU.step.json.

The model is drawn at the top of every printed range: 4.80 x 3.50 x 1.55 mm against L 4.50 +/-0.30, W 3.20 +/-0.30 and, for this part's thickness code GH, T 1.40 +/-0.15 mm. Its terminal band measures 0.88 mm on the top face, inside B 0.60 +/-0.35 mm. A real part will usually be smaller than the model in all three directions.

The page viewer shows c1812c124j1gactu-hero.glb: the clean model plus nonphysical reference artwork drawn under it to the adom-hero standard (adom/component-hero): the footprint's pads as teal dashed outlines at 50 % opacity, its silkscreen at 70 % transparency and the pad numbers 1 and 2. The part is non-polar, so no pin-1 dot is added. The artwork never goes into the STEP, package-reference.glb or the board LODs.

Hero preview, top and oblique

Model checked against the printed dimensions

The model was rendered in orthographic top, bottom, side and end views at true scale and laid over a drawing made at the same scale from the printed limits (nominal outline, tolerance limits, allowed terminal band). Every dimension is inside the printed range: L 4.800 mm (4.20 to 4.80), W 3.500 mm (2.90 to 3.50), T/H 1.550 mm (1.25 to 1.55), B (band width), top 0.877 mm (0.25 to 0.95), B (band width), bottom 0.877 mm (0.25 to 0.95).

Model over the printed dimensions

Source: datasheet C1003_C0G p.3 (1812: L 4.50 +/-0.30, W 3.20 +/-0.30, B 0.60 +/-0.35, S 2.30 min) and p.8 + p.10 (0.12 uF, 100 V: thickness code GH, T 1.40 +/-0.15 mm).

Board levels of detail

Clean board-use GLBs (no footprint pads, outlines, labels or silkscreen) in four levels, all in the same Z-up, metre, footprint-origin pose as the STEP. Previews are rendered from each GLB.

CAD files

File What it is
C1812C124J1GACTU.kicad_sym KiCad symbol (standard capacitor graphic, pin ends on the 2.54 mm grid) with MPN, Manufacturer, Mouser, DigiKey, LCSC (empty) and Adom Wiki fields
C_1812_4532Metric_C1812C124J1GACTU.kicad_mod KiCad footprint (KiCad library C_1812_4532Metric, renamed; model ${KIPRJMOD}/C1812C124J1GACTU.step)
C1812C124J1GACTU.lbr Fusion / EAGLE library made with adom-lbr generate
altium/C1812C124J1GACTU.SchLib, altium/C1812C124J1GACTU.PcbLib Altium symbol and footprint libraries (native binary) made with adom-lbr import-kicad and assemble-altium (the PcbLib embeds the STEP body); C1812C124J1GACTU.adom-lbr.json is the adom-lbr hub record
C1812C124J1GACTU.step 3D model, STEP: KEMET's package solid, Z-up, seated and centred
vendor/C1812C124J1GACTU-kemet-original.step KEMET's STEP exactly as downloaded
package-reference.glb 3D model, GLB (clean, for board viewers)
c1812c124j1gactu-hero.glb the page's 3D view: package plus footprint pad outlines, silkscreen and pad labels
lod/ board-use GLBs in four levels of detail, with previews and manifest

Datasheet figures

The pages this record cites, cropped from the datasheet:

Figure Source
p.1 overview (no change in capacitance with time and voltage, +/-30 ppm/C) and ordering information (C 1812 C 124 J 1 G A C TU) KEMET C1003_C0G, p.1
p.2 packaging C-spec (TU = 7 inch reel, unmarked) and benefits (no capacitance change with applied rated DC voltage, no decay with time) KEMET C1003_C0G, p.2
p.3 dimensions: 1812 L 4.50 +/-0.30, W 3.20 +/-0.30, B 0.60 +/-0.35, S 2.30 min (mm) KEMET C1003_C0G, p.3
p.4 electrical parameters: -55 to +125 C, +/-30 ppm/C, 0 % aging, DWV 250 %, DF 0.1 %, IR KEMET C1003_C0G, p.4
p.8 Table 1B: 0.12 uF (124) in C1812C at 100 V (voltage code 1) has chip thickness code GH KEMET C1003_C0G, p.8
p.10 Table 2A: thickness code GH = 1.40 +/-0.15 mm; 1,000 pcs per 7 inch plastic reel KEMET C1003_C0G, p.10
p.12 Table 3: IPC-7351 land pattern for 1812 at density levels A, B and C KEMET C1003_C0G, p.12
p.13 soldering: reflow only for 1812, profile for 100 % matte Sn (260 C peak) KEMET C1003_C0G, p.13
p.15 construction and marking: C0G devices are supplied unmarked only KEMET C1003_C0G, p.15

Sources and license

Original Adom content is CC-BY-4.0. KEMET's STEP, its derivatives and the datasheet keep KEMET's terms and the KiCad footprint keeps its upstream license (CC-BY-SA 4.0 with the KiCad library exception); see LICENSE. provenance.json records every source and file hash; the scripts that built the checks are in provenance/tools/.

This is a catalog record for the part, not a manufacturing approval: check KEMET's current specification for your design.