component
BUF802IRGTR
Public Made by Adomby adom
Texas Instruments FET Input Amplifiers, VQFN-16(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"title": "BUF802IRGTR",
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"manufacturer": "Texas Instruments",
"package": "VQFN-16(3x3)",
"pin_count": 17,
"category": "Amplifiers/Comparators",
"subcategory": "FET Input Amplifiers",
"datasheet": "https://www.ti.com/cn/lit/gpn/buf802",
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"checked_at": "2026-10-18T11:01:01Z",
"source": "Component Ocean /api/assign-pns",
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"pn": null,
"status": "quota"
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"pins": [
{
"number": "1",
"name": "VS+",
"type": "power_in",
"description": "Positive supply connection for the input stage; dual supply range is ±4.5 V to ±6.5 V and VS = (VS+) − (VS−) must not exceed 14 V absolute maximum."
},
{
"number": "2",
"name": "IN",
"type": "input",
"description": "Signal input of the JFET input stage, rated for voltages from (VS−) − 0.5 V up to (VS+) V and used directly in buffer mode."
},
{
"number": "3",
"name": "In_Bias",
"type": "input",
"description": "JFET bias pin that is used only in composite-loop mode and should be left unconnected in buffer mode."
},
{
"number": "4",
"name": "In_Aux",
"type": "input",
"description": "Auxiliary input that controls the output through the auxiliary path in composite-loop mode and should be left unconnected in buffer mode."
},
{
"number": "5",
"name": "VS-",
"type": "power_in",
"description": "Negative supply connection for the input stage, internally shorted to pin 8."
},
{
"number": "6",
"name": "Aux_Bias",
"type": "passive",
"description": "Must be connected to VS- to enable output control through In_Aux in composite-loop mode."
},
{
"number": "7",
"name": "R_Bias",
"type": "input",
"description": "Output-stage bias setting pin; a resistor between R_Bias and VS- sets the quiescent current, with 17.8 kΩ used for the wide-bandwidth test condition."
},
{
"number": "8",
"name": "VS-",
"type": "power_in",
"description": "Negative supply connection for the input stage, internally shorted to pin 5."
},
{
"number": "9",
"name": "NC",
"type": "unconnected",
"description": "No internal connection."
},
{
"number": "10",
"name": "VSO-",
"type": "power_in",
"description": "Negative supply connection for the output stage; must be held at the same potential as VS- because the two are internally tied through back-to-back diodes."
},
{
"number": "11",
"name": "OUT",
"type": "output",
"description": "Buffered signal output that drives loads down to 50 Ω, with output voltage limited by the CLH and CLL clamp pins when internal clamps are enabled."
},
{
"number": "12",
"name": "VSO+",
"type": "power_in",
"description": "Positive supply connection for the output stage; must be held at the same potential as VS+ because the two are internally tied through back-to-back diodes."
},
{
"number": "13",
"name": "NC",
"type": "unconnected",
"description": "No internal connection."
},
{
"number": "14",
"name": "CLL",
"type": "input",
"description": "Sets the negative output clamp voltage and is used only in composite-loop mode; it should be left unconnected in buffer mode, and tying it to VS- disables the internal clamp."
},
{
"number": "15",
"name": "CLH",
"type": "input",
"description": "Sets the positive output clamp voltage and is used only in composite-loop mode; it should be left unconnected in buffer mode, and tying it to VS+ disables the internal clamp."
},
{
"number": "16",
"name": "NC",
"type": "unconnected",
"description": "No internal connection."
},
{
"number": "17",
"name": "Thermal pad",
"type": "passive",
"description": "Thermal pad is electrically isolated from the die and all pins and may be connected to any potential for heat dissipation."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
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"primary_model": "claude-haiku-5-5",
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"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Table 4-1 lists Aux_Bias as type 'P' (power), but its stated function is to be tied to VS– to enable; The pin table (Table 4-1) does not number the thermal pad. The number 17 comes from the PAD label in; Pin 5 and pin 8 are internally shorted, and VSO+/VSO– (pins 12/10) are tied to VS+/VS– through back-"
],
"pages_sent": 27,
"cost_usd": 0.1282,
"at": "2026-10-18T10:59:24"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/buf802",
"pages": 40,
"sha256": "8030ec533a0ed4d9",
"source_tier": "lcsc"
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"cad": "KiCad official (CC-BY-SA 4.0)",
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"described": 17,
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"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "VQFN-16(3x3)",
"Category": "Amplifiers/Comparators",
"Pins": "17"
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