BU8254KVT-E2

{
  "slug": "bu8254kvt-e2",
  "version": "0.1.0",
  "type": "component",
  "description": "ROHM Semicon LVDS ICs, TQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "interface ics",
    "bu8254kvt-e2",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "bu8254kvt-e2.kicad_sym",
    "bu8254kvt-e2.kicad_mod",
    "bu8254kvt-e2.glb",
    "bu8254kvt-e2.step",
    "bu8254kvt-e2.lbr",
    "docs/hero.png",
    "docs/bu8254kvt-e2-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "bu8254kvt-e2-hero.glb",
    "bu8254kvt-e2-hero.overlay.json",
    "bu8254kvt-e2-etched.glb"
  ],
  "component": {
    "mpn": "BU8254KVT-E2",
    "manufacturer": "ROHM Semicon",
    "package": "TQFP-64(10x10)",
    "pin_count": 64,
    "category": "Interface ICs",
    "subcategory": "LVDS ICs",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/19e347ec6c46e7be612b7d5400dbc76e.pdf",
    "parts": {
      "symbol": "bu8254kvt-e2.kicad_sym",
      "footprint": "bu8254kvt-e2.kicad_mod",
      "model_3d": "bu8254kvt-e2-hero.glb",
      "model_3d_plain": "bu8254kvt-e2-etched.glb",
      "model_3d_step": "bu8254kvt-e2-etched.step",
      "model_3d_step_plain": "bu8254kvt-e2.step",
      "lbr": "bu8254kvt-e2.lbr"
    },
    "distributor_links": {
      "lcsc": "C2671763"
    },
    "distributor_check": {
      "checked_at": "2026-10-22T22:01:24Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "TD5",
        "type": "input",
        "description": "LVCMOS pixel data input TD5 of channel D, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "2",
        "name": "GND",
        "type": "power_in",
        "description": "Ground for LVCMOS inputs and digital core."
      },
      {
        "number": "3",
        "name": "TD6",
        "type": "input",
        "description": "LVCMOS pixel data input TD6 of channel D, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "4",
        "name": "TE0",
        "type": "input",
        "description": "LVCMOS pixel data input TE0 of channel E, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "5",
        "name": "TE1",
        "type": "input",
        "description": "LVCMOS pixel data input TE1 of channel E, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "6",
        "name": "TE2",
        "type": "input",
        "description": "LVCMOS pixel data input TE2 of channel E, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "7",
        "name": "VDD",
        "type": "power_in",
        "description": "Power supply for LVCMOS inputs and digital core, 3.0 V to 3.6 V (3.3 V typ)."
      },
      {
        "number": "8",
        "name": "TE3",
        "type": "input",
        "description": "LVCMOS pixel data input TE3 of channel E, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "9",
        "name": "TE4",
        "type": "input",
        "description": "LVCMOS pixel data input TE4 of channel E, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "10",
        "name": "GND",
        "type": "power_in",
        "description": "Ground for LVCMOS inputs and digital core."
      },
      {
        "number": "11",
        "name": "TE5",
        "type": "input",
        "description": "LVCMOS pixel data input TE5 of channel E, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "12",
        "name": "CLKIN",
        "type": "input",
        "description": "Clock input, 8 MHz to 112 MHz (period 8.93 ns to 125 ns)."
      },
      {
        "number": "13",
        "name": "XRST",
        "type": "input",
        "description": "H: normal operation; L: power down with all outputs Hi-Z."
      },
      {
        "number": "14",
        "name": "PLLGND",
        "type": "power_in",
        "description": "Ground for the PLL core."
      },
      {
        "number": "15",
        "name": "PLLVDD",
        "type": "power_in",
        "description": "Power supply for the PLL core, 3.0 V to 3.6 V."
      },
      {
        "number": "16",
        "name": "TE6",
        "type": "input",
        "description": "LVCMOS pixel data input TE6 of channel E, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "17",
        "name": "LVDS GND",
        "type": "power_in",
        "description": "Ground for LVDS outputs."
      },
      {
        "number": "18",
        "name": "TEP",
        "type": "output",
        "description": "LVDS data output positive for channel E."
      },
      {
        "number": "19",
        "name": "TEN",
        "type": "output",
        "description": "LVDS data output negative for channel E."
      },
      {
        "number": "20",
        "name": "TDP",
        "type": "output",
        "description": "LVDS data output positive for channel D."
      },
      {
        "number": "21",
        "name": "TDN",
        "type": "output",
        "description": "LVDS data output negative for channel D."
      },
      {
        "number": "22",
        "name": "TCLKP",
        "type": "output",
        "description": "LVDS clock output positive."
      },
      {
        "number": "23",
        "name": "TCLKN",
        "type": "output",
        "description": "LVDS clock output negative."
      },
      {
        "number": "24",
        "name": "TCP",
        "type": "output",
        "description": "LVDS data output positive for channel C."
      },
      {
        "number": "25",
        "name": "TCN",
        "type": "output",
        "description": "LVDS data output negative for channel C."
      },
      {
        "number": "26",
        "name": "LVDS GND",
        "type": "power_in",
        "description": "Ground for LVDS outputs."
      },
      {
        "number": "27",
        "name": "LVDS VDD",
        "type": "power_in",
        "description": "Power supply for LVDS outputs, 3.0 V to 3.6 V."
      },
      {
        "number": "28",
        "name": "TBP",
        "type": "output",
        "description": "LVDS data output positive for channel B."
      },
      {
        "number": "29",
        "name": "TBN",
        "type": "output",
        "description": "LVDS data output negative for channel B."
      },
      {
        "number": "30",
        "name": "TAP",
        "type": "output",
        "description": "LVDS data output positive for channel A."
      },
      {
        "number": "31",
        "name": "TAN",
        "type": "output",
        "description": "LVDS data output negative for channel A."
      },
      {
        "number": "32",
        "name": "LVDS GND",
        "type": "power_in",
        "description": "Ground for LVDS outputs."
      },
      {
        "number": "33",
        "name": "TA0",
        "type": "input",
        "description": "LVCMOS pixel data input TA0 of channel A, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "34",
        "name": "TA1",
        "type": "input",
        "description": "LVCMOS pixel data input TA1 of channel A, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "35",
        "name": "TA2",
        "type": "input",
        "description": "LVCMOS pixel data input TA2 of channel A, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "36",
        "name": "TA3",
        "type": "input",
        "description": "LVCMOS pixel data input TA3 of channel A, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "37",
        "name": "TA4",
        "type": "input",
        "description": "LVCMOS pixel data input TA4 of channel A, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "38",
        "name": "TA5",
        "type": "input",
        "description": "LVCMOS pixel data input TA5 of channel A, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "39",
        "name": "GND",
        "type": "power_in",
        "description": "Ground for LVCMOS inputs and digital core."
      },
      {
        "number": "40",
        "name": "TA6",
        "type": "input",
        "description": "LVCMOS pixel data input TA6 of channel A, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "41",
        "name": "TB0",
        "type": "input",
        "description": "LVCMOS pixel data input TB0 of channel B, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "42",
        "name": "TB1",
        "type": "input",
        "description": "LVCMOS pixel data input TB1 of channel B, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "43",
        "name": "RS",
        "type": "input",
        "description": "LVDS swing select and small-swing VREF input: VDD gives 350 mV swing, GND gives 200 mV swing, 0.6 V to 1.4 V sets VREF for small swing input with 350 mV output."
      },
      {
        "number": "44",
        "name": "TB2",
        "type": "input",
        "description": "LVCMOS pixel data input TB2 of channel B, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "45",
        "name": "TB3",
        "type": "input",
        "description": "LVCMOS pixel data input TB3 of channel B, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "46",
        "name": "TB4",
        "type": "input",
        "description": "LVCMOS pixel data input TB4 of channel B, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "47",
        "name": "GND",
        "type": "power_in",
        "description": "Ground for LVCMOS inputs and digital core."
      },
      {
        "number": "48",
        "name": "TB5",
        "type": "input",
        "description": "LVCMOS pixel data input TB5 of channel B, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "49",
        "name": "TB6",
        "type": "input",
        "description": "LVCMOS pixel data input TB6 of channel B, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "50",
        "name": "TC0",
        "type": "input",
        "description": "LVCMOS pixel data input TC0 of channel C, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "51",
        "name": "VDD",
        "type": "power_in",
        "description": "Power supply for LVCMOS inputs and digital core, 3.0 V to 3.6 V (3.3 V typ)."
      },
      {
        "number": "52",
        "name": "TC1",
        "type": "input",
        "description": "LVCMOS pixel data input TC1 of channel C, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "53",
        "name": "TC2",
        "type": "input",
        "description": "LVCMOS pixel data input TC2 of channel C, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "54",
        "name": "TC3",
        "type": "input",
        "description": "LVCMOS pixel data input TC3 of channel C, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "55",
        "name": "TC4",
        "type": "input",
        "description": "LVCMOS pixel data input TC4 of channel C, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "56",
        "name": "GND",
        "type": "power_in",
        "description": "Ground for LVCMOS inputs and digital core."
      },
      {
        "number": "57",
        "name": "TC5",
        "type": "input",
        "description": "LVCMOS pixel data input TC5 of channel C, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "58",
        "name": "TC6",
        "type": "input",
        "description": "LVCMOS pixel data input TC6 of channel C, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "59",
        "name": "TD0",
        "type": "input",
        "description": "LVCMOS pixel data input TD0 of channel D, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "60",
        "name": "RF",
        "type": "input",
        "description": "Input clock triggering edge select: H for rising edge, L for falling edge."
      },
      {
        "number": "61",
        "name": "TD1",
        "type": "input",
        "description": "LVCMOS pixel data input TD1 of channel D, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "62",
        "name": "TD2",
        "type": "input",
        "description": "LVCMOS pixel data input TD2 of channel D, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "63",
        "name": "TD3",
        "type": "input",
        "description": "LVCMOS pixel data input TD3 of channel D, with VIH min VDD×0.8 and VIL max VDD×0.2."
      },
      {
        "number": "64",
        "name": "TD4",
        "type": "input",
        "description": "LVCMOS pixel data input TD4 of channel D, with VIH min VDD×0.8 and VIL max VDD×0.2."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The pin diagram (page 4) labels pin 60 as 'TDO', while the pin table (page 5) lists RF at pin 60. I ; The datasheet calls the package TQFP64V, with a 10.0 mm body and 12.0 mm overall. The package hint '; The RS pin has several functions: swing select and VREF for small-swing input. I typed it as input."
        ],
        "pages_sent": 20,
        "cost_usd": 0.2115,
        "at": "2026-10-22T22:00:58"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/19e347ec6c46e7be612b7d5400dbc76e.pdf",
        "pages": 20,
        "sha256": "2d3a35fc4ad3fc64",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 64,
        "described": 64,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
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        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          12.0,
          12.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "60567e81b0770b6c519104183a7a05ba52dddc11146b5fbe21434fbb5801696c",
        "checked": "2026-10-22",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "bu8254kvt-e2-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "f0d0fb7ba0d231a2070cdee9407bdacbb312c8a0e935c990eafd5d44bf80b530",
        "checked": "2026-10-22",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}