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BTA308Y-800C0TQ

WeEn Semiconductors · Thyristors (SCR)/Modules · TO-220AB

BTA308Y-800C0TQ from WeEn Semiconductors, in a TO-220AB. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 T1 passive Main terminal 1 of the triac, with the repetitive peak off-state voltage limited to 800 V (VDRM) and RMS on-state current limited to 8 A (IT(RMS)).
2 T2 passive Main terminal 2 of the triac, which is the reference for the three triggering quadrants (T2+ G+, T2+ G-, T2- G-) given in the characteristics.
3 G input Gate, used only for triggering in three quadrants, with IGT of 5 to 35 mA at VD = 12 V, IT = 0.1 A, Tj = 25 °C, and limited to 2 A peak gate current (IGM) and 5 W peak gate power (PGM).

Key specifications

Parameter Value
Manufacturer WeEn Semiconductors
Package TO-220AB
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
IGT gate trigger current (T2+ G+) IGT 5 35 mA VD = 12 V; IT = 0.1 A; T2+ G+; Tj = 25 °C; Fig. 7 6
IGT gate trigger current (T2+ G-) IGT 5 35 mA VD = 12 V; IT = 0.1 A; T2+ G-; Tj = 25 °C; Fig. 7 6
IGT gate trigger current (T2- G-) IGT 5 35 mA VD = 12 V; IT = 0.1 A; T2- G-; Tj = 25 °C; Fig. 7 6
IL latching current (T2+ G+) IL 50 mA VD = 12 V; IT = 0.1 A; T2+ G+; Tj = 25 °C; Fig. 8 6
IL latching current (T2+ G-) IL 75 mA VD = 12 V; IT = 0.1 A; T2+ G-; Tj = 25 °C; Fig. 8 6
IL latching current (T2- G-) IL 50 mA VD = 12 V; IT = 0.1 A; T2- G-; Tj = 25 °C; Fig. 8 6
IH holding current IH 50 mA VD = 12 V; Tj = 25 °C; Fig. 9 6
VT on-state voltage VT 1.3 1.65 V IT = 10 A; Tj = 25 °C; Fig. 10 6
VGT gate trigger voltage VGT 0.7 1 V VD = 12 V; IT = 0.1 A; Tj = 25 °C; Fig. 11 6
VGT gate trigger voltage VGT 0.2 0.45 V VD = 400 V; IT = 0.1 A; Tj = 150 °C; Fig. 11 6
ID off-state current ID 10 μA VD = 800 V; Tj = 25 °C 6
ID off-state current ID 1 mA VD = 800 V; Tj = 150 °C 6
rate of rise of off-state voltage dVD/dt 2000 V/μs VDM = 536 V; Tj = 125 °C; (VDM = 67% of VDRM); exponential waveform; gate open circuit 6
rate of rise of off-state voltage dVD/dt 1500 V/μs VDM = 536 V; Tj = 150 °C; (VDM = 67% of VDRM); exponential waveform; gate open circuit 6
rate of change of commutating current dIcom/dt 7 A/ms VD = 400 V; Tj = 150 °C; IT(RMS) = 8 A; dVcom/dt = 20 V/μs; gate open circuit; snubberless condition; Fig. 12 6
repetitive peak off-state voltage VDRM 800 V 3
RMS on-state current IT(RMS) 8 A full sine wave; Tmb ≤ 121 °C; Fig. 1; Fig. 2; Fig. 3 3
non-repetitive peak on-state current ITSM 60 A full sine wave; tp = 20 ms; Tj(init) = 25 °C; Fig. 4; Fig. 5 3
non-repetitive peak on-state current ITSM 65 A full sine wave; tp = 16.7 ms; Tj(init) = 25 °C 3
I2t for fusing I2t 18 A2s tp = 10 ms; sine wave 3
rate of rise of on-state current dIT/dt 100 A/μs IG = 70 mA 3
peak gate current IGM 2 A 3
peak gate power PGM 5 W 3
average gate power PG(AV) 0.5 W over any 20 ms period 3
storage temperature Tstg -40 150 °C 3
junction temperature Tj 150 °C 3
thermal resistance from junction to mounting base Rth(j-mb) 2.7 K/W Fig. 6 5
thermal resistance from junction to ambient free air Rth(j-a) 60 K/W in free air 5
RMS isolation voltage Visol(RMS) 2500 V 50 Hz ≤ f ≤ 60 Hz; RH ≤ 65 %; from all pins to external heatsink; sinusoidal waveform; clean and dust free 5
isolation capacitance from cathode to external heatsink Cisol 10 PF from cathode to external heatsink 5

CAD (KiCad official)

  • Symbol: BTA308Y-800C0TQ
  • Footprint: Package_TO_SOT_THT:TO-220-3_Vertical
  • 3D model: TO-220AB (KiCad packages3D, STEP)
  • 3D model files: bta308y-800c0tq-etched.step / bta308y-800c0tq-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bta308y-800c0tq.step / bta308y-800c0tq.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: WeEn Semiconductors datasheet (12 pp, sha256 ce548eaf02ffc391, retrieved 2026-10-15, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF