# BSS8402DW-7-F

**Diodes Incorporated** · MOSFETs · SOT-363

BSS8402DW-7-F from Diodes Incorporated, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of N-channel Q1 (60V, 115mA, RDS(ON) max 13.5Ω at VGS=10V). |
| 2 | G1 | input | Gate of N-channel Q1, with VGS(TH) of 1.0V to 2.5V and a maximum continuous VGS of ±20V. |
| 3 | D2 | passive | Drain of P-channel Q2 (-50V, -130mA, RDS(ON) max 10Ω at VGS=-5V). |
| 4 | S2 | passive | Source of P-channel Q2. |
| 5 | G2 | input | Gate of P-channel Q2, with VGS(TH) of -0.8V to -2.0V and a maximum VGS of 20V. |
| 6 | D1 | passive | Drain of N-channel Q1, with VDSS of 60V and continuous ID of 115mA. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-363 |
| Category | Transistors |
| Pins | 6 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power Dissipation | PD |  |  | 200 | mW |  | 2 |
| Thermal Resistance, Junction to Ambient | RθJA |  |  | 625 | °C/W |  | 2 |
| Operating and Storage Temperature Range | TJ, TSTG | -55 |  | 150 | °C |  | 2 |
| Drain-Source Voltage (N-channel Q1) | VDSS |  |  | 60 | V |  | 2 |
| Drain-Gate Voltage (N-channel Q1) | VDGR |  |  | 60 | V | RGS 1.0MΩ | 2 |
| Gate-Source Voltage Continuous (N-channel Q1) | VGSS | -20 |  | 20 | V |  | 2 |
| Gate-Source Voltage Pulsed (N-channel Q1) | VGSS | -40 |  | 40 | V |  | 2 |
| Drain Current Continuous (N-channel Q1) | ID |  |  | 115 | mA |  | 2 |
| Drain Current Continuous (N-channel Q1) | ID |  |  | 73 | mA | @ +100°C | 2 |
| Drain Current Pulsed (N-channel Q1) | ID |  |  | 800 | mA |  | 2 |
| Drain-Source Voltage (P-channel Q2) | VDSS | -50 |  |  | V |  | 2 |
| Drain-Gate Voltage (P-channel Q2) | VDGR | -50 |  |  | V | RGS 20KΩ | 2 |
| Gate-Source Voltage Continuous (P-channel Q2) | VGSS |  |  | 20 | V |  | 2 |
| Drain Current Continuous (P-channel Q2) | ID | -130 |  |  | mA |  | 2 |
| Drain-Source Breakdown Voltage (N-channel Q1) | BVDSS | 60 | 70 |  | V | VGS = 0V, ID = 10µA | 3 |
| Zero Gate Voltage Drain Current @ TC = +25°C (N-channel Q1) | IDSS |  |  | 1 | µA | TC = +25°C, VDS = 60V, VGS = 0V | 3 |
| Zero Gate Voltage Drain Current @ TC = +125°C (N-channel Q1) | IDSS |  |  | 500 | µA | TC = +125°C, VDS = 60V, VGS = 0V | 3 |
| Gate-Body Leakage (N-channel Q1) | IGSS | -10 |  | 10 | nA | VGS = ±20V, VDS = 0V | 3 |
| Gate Threshold Voltage (N-channel Q1) | VGS(TH) | 1 |  | 2.5 | V | VDS = VGS, ID = 250µA | 3 |
| Static Drain-Source On-Resistance (N-channel Q1) | RDS(ON) |  |  | 13.5 | Ω | VGS = 10V, ID = 0.5A | 3 |
| On-State Drain Current (N-channel Q1) | ID(ON) | 0.5 | 1 |  | A | VGS = 10V, VDS = 7.5V | 3 |
| Forward Transconductance (N-channel Q1) | gFS | 80 |  |  | mS | VDS = 10V, ID = 0.2A | 3 |
| Input Capacitance (N-channel Q1) | Ciss |  | 22 | 50 | pF |  | 3 |
| Output Capacitance (N-channel Q1) | Coss |  | 11 | 25 | pF | VDS = 25V, VGS = 0V, f = 1.0MHz | 3 |
| Reverse Transfer Capacitance (N-channel Q1) | Crss |  | 2 | 5 | pF |  | 3 |
| Turn-On Delay Time (N-channel Q1) | tD(ON) |  | 7 | 20 | ns | VDD = 30V, ID = 0.2A, RL = 150Ω, VGEN = 10V, RGEN = 25Ω | 3 |
| Turn-Off Delay Time (N-channel Q1) | tD(OFF) |  | 11 | 20 | ns | VDD = 30V, ID = 0.2A, RL = 150Ω, VGEN = 10V, RGEN = 25Ω | 3 |
| Drain-Source Breakdown Voltage (P-channel Q2) | BVDSS | -50 |  |  | V | VGS = 0V, ID = -250µA | 3 |
| Zero Gate Voltage Drain Current, TJ = +25°C (P-channel Q2) | IDSS | -1 |  |  | µA | VDS = -50V, VGS = 0V, TJ = +25°C | 3 |
| Zero Gate Voltage Drain Current, TJ = +125°C (P-channel Q2) | IDSS | -2 |  |  | µA | VDS = -50V, VGS = 0V, TJ = +125°C | 3 |
| Zero Gate Voltage Drain Current (P-channel Q2) | IDSS | -100 |  |  | nA | VDS = -25V, VGS = 0V, TJ = +25°C | 3 |
| Gate-Body Leakage (P-channel Q2) | IGSS |  |  | 10 | nA | VGS = 20V, VDS = 0V | 3 |
| Gate Threshold Voltage (P-channel Q2) | VGS(TH) | -0.8 |  | -2 | V | VDS = VGS, ID = -1mA | 3 |
| Static Drain-Source On-Resistance (P-channel Q2) | RDS(ON) |  |  | 10 | Ω | VGS = -5V, ID = -0.100A | 3 |
| Forward Transconductance (P-channel Q2) | gFS | 0.05 |  |  | S | VDS = -25V, ID = -0.1A | 3 |
| Input Capacitance (P-channel Q2) | Ciss |  |  | 45 | pF |  | 3 |
| Output Capacitance (P-channel Q2) | Coss |  |  | 25 | pF | VDS = -25V, VGS = 0V, f = 1.0MHz | 3 |
| Reverse Transfer Capacitance (P-channel Q2) | Crss |  |  | 12 | pF |  | 3 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts |  | tin |  Terminals: Matte Tin Finish Annealed over Alloy 42 Leadframe (Lead Free Plating). Solderable per MIL-STD-202, Method 208 | 1 |

## CAD (KiCad official)

- Symbol: `BSS8402DW-7-F`
- Footprint: `Package_TO_SOT_SMD:SOT-363_SC-70-6`
- 3D model: SOT-363 (KiCad packages3D, STEP)
- 3D model files: `bss8402dw-7-f-etched.step` / `bss8402dw-7-f-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `bss8402dw-7-f.step` / `bss8402dw-7-f.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Diodes Incorporated datasheet](https://www.diodes.com/assets/Datasheets/BSS8402DW-7-F.pdf) (8 pp, sha256 `c1385d8ef0065ecb`, retrieved 2026-11-04, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/bss8402dw-7-f-datasheet.pdf)